URL
https://opencores.org/ocsvn/two_dimensional_fast_hartley_transform/two_dimensional_fast_hartley_transform/trunk
Subversion Repositories two_dimensional_fast_hartley_transform
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/trunk/dpsram_128x16.v
0,0 → 1,149
/******************************************************************************* |
* This file is owned and controlled by Xilinx and must be used * |
* solely for design, simulation, implementation and creation of * |
* design files limited to Xilinx devices or technologies. Use * |
* with non-Xilinx devices or technologies is expressly prohibited * |
* and immediately terminates your license. * |
* * |
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" * |
* SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR * |
* XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION * |
* AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION * |
* OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS * |
* IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, * |
* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE * |
* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY * |
* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE * |
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR * |
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF * |
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * |
* FOR A PARTICULAR PURPOSE. * |
* * |
* Xilinx products are not intended for use in life support * |
* appliances, devices, or systems. Use in such applications are * |
* expressly prohibited. * |
* * |
* (c) Copyright 1995-2007 Xilinx, Inc. * |
* All rights reserved. * |
*******************************************************************************/ |
// The synthesis directives "translate_off/translate_on" specified below are |
// supported by Xilinx, Mentor Graphics and Synplicity synthesis |
// tools. Ensure they are correct for your synthesis tool(s). |
|
// You must compile the wrapper file dpsram_128x16.v when simulating |
// the core, dpsram_128x16. When compiling the wrapper file, be sure to |
// reference the XilinxCoreLib Verilog simulation library. For detailed |
// instructions, please refer to the "CORE Generator Help". |
|
`timescale 1ns/1ps |
|
module dpsram_128x16( |
addra, |
addrb, |
clka, |
clkb, |
dina, |
dinb, |
douta, |
doutb, |
ena, |
enb, |
wea, |
web); |
|
|
input [6 : 0] addra; |
input [6 : 0] addrb; |
input clka; |
input clkb; |
input [15 : 0] dina; |
input [15 : 0] dinb; |
output [15 : 0] douta; |
output [15 : 0] doutb; |
input ena; |
input enb; |
input wea; |
input web; |
|
// synthesis translate_off |
|
BLKMEMDP_V6_3 #( |
.c_addra_width(7), |
.c_addrb_width(7), |
.c_default_data("0"), |
.c_depth_a(128), |
.c_depth_b(128), |
.c_enable_rlocs(0), |
.c_has_default_data(1), |
.c_has_dina(1), |
.c_has_dinb(1), |
.c_has_douta(1), |
.c_has_doutb(1), |
.c_has_ena(1), |
.c_has_enb(1), |
.c_has_limit_data_pitch(0), |
.c_has_nda(0), |
.c_has_ndb(0), |
.c_has_rdya(0), |
.c_has_rdyb(0), |
.c_has_rfda(0), |
.c_has_rfdb(0), |
.c_has_sinita(0), |
.c_has_sinitb(0), |
.c_has_wea(1), |
.c_has_web(1), |
.c_limit_data_pitch(18), |
.c_mem_init_file("mif_file_16_1"), |
.c_pipe_stages_a(0), |
.c_pipe_stages_b(0), |
.c_reg_inputsa(0), |
.c_reg_inputsb(0), |
.c_sim_collision_check("NONE"), |
.c_sinita_value("0"), |
.c_sinitb_value("0"), |
.c_width_a(16), |
.c_width_b(16), |
.c_write_modea(2), |
.c_write_modeb(2), |
.c_ybottom_addr("0"), |
.c_yclka_is_rising(1), |
.c_yclkb_is_rising(1), |
.c_yena_is_high(0), |
.c_yenb_is_high(0), |
.c_yhierarchy("hierarchy1"), |
.c_ymake_bmm(0), |
.c_yprimitive_type("32kx1"), |
.c_ysinita_is_high(1), |
.c_ysinitb_is_high(1), |
.c_ytop_addr("1024"), |
.c_yuse_single_primitive(0), |
.c_ywea_is_high(0), |
.c_yweb_is_high(0), |
.c_yydisable_warnings(1)) |
inst ( |
.ADDRA(addra), |
.ADDRB(addrb), |
.CLKA(clka), |
.CLKB(clkb), |
.DINA(dina), |
.DINB(dinb), |
.DOUTA(douta), |
.DOUTB(doutb), |
.ENA(ena), |
.ENB(enb), |
.WEA(wea), |
.WEB(web), |
.NDA(), |
.NDB(), |
.RFDA(), |
.RFDB(), |
.RDYA(), |
.RDYB(), |
.SINITA(), |
.SINITB()); |
|
|
// synthesis translate_on |
|
endmodule |
|
/trunk/dpsram_128x16.edn
0,0 → 1,1041
(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0)) |
(status (written (timeStamp 2009 6 4 14 43 27) |
(author "Xilinx, Inc.") |
(program "Xilinx CORE Generator" (version "Xilinx CORE Generator 9.2.04i; Cores Update # 2")))) |
(comment " |
This file is owned and controlled by Xilinx and must be used |
solely for design, simulation, implementation and creation of |
design files limited to Xilinx devices or technologies. Use |
with non-Xilinx devices or technologies is expressly prohibited |
and immediately terminates your license. |
|
XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS' |
SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR |
XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION |
AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION |
OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS |
IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, |
AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE |
FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY |
WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE |
IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR |
REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF |
INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
FOR A PARTICULAR PURPOSE. |
|
Xilinx products are not intended for use in life support |
appliances, devices, or systems. Use in such applications are |
expressly prohibited. |
|
(c) Copyright 1995-2007 Xilinx, Inc. |
All rights reserved. |
|
") |
(comment "Core parameters: ") |
(comment "c_reg_inputsb = 0 ") |
(comment "c_reg_inputsa = 0 ") |
(comment "c_has_ndb = 0 ") |
(comment "c_has_nda = 0 ") |
(comment "c_ytop_addr = 1024 ") |
(comment "c_has_rfdb = 0 ") |
(comment "c_has_rfda = 0 ") |
(comment "c_ywea_is_high = 0 ") |
(comment "c_yena_is_high = 0 ") |
(comment "InstanceName = dpsram_128x16 ") |
(comment "c_yclka_is_rising = 1 ") |
(comment "c_yhierarchy = hierarchy1 ") |
(comment "c_family = virtex4 ") |
(comment "c_ysinita_is_high = 1 ") |
(comment "c_ybottom_addr = 0 ") |
(comment "c_width_b = 16 ") |
(comment "c_width_a = 16 ") |
(comment "c_sinita_value = 0 ") |
(comment "c_sinitb_value = 0 ") |
(comment "c_limit_data_pitch = 18 ") |
(comment "c_write_modeb = 2 ") |
(comment "c_write_modea = 2 ") |
(comment "c_has_rdyb = 0 ") |
(comment "c_yuse_single_primitive = 0 ") |
(comment "c_has_rdya = 0 ") |
(comment "c_addra_width = 7 ") |
(comment "c_addrb_width = 7 ") |
(comment "c_has_limit_data_pitch = 0 ") |
(comment "c_default_data = 0 ") |
(comment "c_pipe_stages_b = 0 ") |
(comment "c_yweb_is_high = 0 ") |
(comment "c_yenb_is_high = 0 ") |
(comment "c_pipe_stages_a = 0 ") |
(comment "c_yclkb_is_rising = 1 ") |
(comment "c_yydisable_warnings = 1 ") |
(comment "c_enable_rlocs = 0 ") |
(comment "c_ysinitb_is_high = 1 ") |
(comment "c_has_web = 1 ") |
(comment "c_has_default_data = 1 ") |
(comment "c_has_sinitb = 0 ") |
(comment "c_has_wea = 1 ") |
(comment "c_has_sinita = 0 ") |
(comment "c_has_dinb = 1 ") |
(comment "c_has_dina = 1 ") |
(comment "c_ymake_bmm = 0 ") |
(comment "c_sim_collision_check = NONE ") |
(comment "c_has_enb = 1 ") |
(comment "c_has_ena = 1 ") |
(comment "c_depth_b = 128 ") |
(comment "c_mem_init_file = mif_file_16_1 ") |
(comment "c_depth_a = 128 ") |
(comment "c_has_doutb = 1 ") |
(comment "c_has_douta = 1 ") |
(comment "c_yprimitive_type = 32kx1 ") |
(external xilinxun (edifLevel 0) |
(technology (numberDefinition)) |
(cell VCC (cellType GENERIC) |
(view view_1 (viewType NETLIST) |
(interface |
(port P (direction OUTPUT)) |
) |
) |
) |
(cell GND (cellType GENERIC) |
(view view_1 (viewType NETLIST) |
(interface |
(port G (direction OUTPUT)) |
) |
) |
) |
(cell INV (cellType GENERIC) |
(view view_1 (viewType NETLIST) |
(interface |
(port I (direction INPUT)) |
(port O (direction OUTPUT)) |
) |
) |
) |
(cell RAMB16 (cellType GENERIC) |
(view view_1 (viewType NETLIST) |
(interface |
(port (rename DOA_0_ "DOA(0)") (direction OUTPUT)) |
(port (rename DOA_1_ "DOA(1)") (direction OUTPUT)) |
(port (rename DOA_2_ "DOA(2)") (direction OUTPUT)) |
(port (rename DOA_3_ "DOA(3)") (direction OUTPUT)) |
(port (rename DOA_4_ "DOA(4)") (direction OUTPUT)) |
(port (rename DOA_5_ "DOA(5)") (direction OUTPUT)) |
(port (rename DOA_6_ "DOA(6)") (direction OUTPUT)) |
(port (rename DOA_7_ "DOA(7)") (direction OUTPUT)) |
(port (rename DOA_8_ "DOA(8)") (direction OUTPUT)) |
(port (rename DOA_9_ "DOA(9)") (direction OUTPUT)) |
(port (rename DOA_10_ "DOA(10)") (direction OUTPUT)) |
(port (rename DOA_11_ "DOA(11)") (direction OUTPUT)) |
(port (rename DOA_12_ "DOA(12)") (direction OUTPUT)) |
(port (rename DOA_13_ "DOA(13)") (direction OUTPUT)) |
(port (rename DOA_14_ "DOA(14)") (direction OUTPUT)) |
(port (rename DOA_15_ "DOA(15)") (direction OUTPUT)) |
(port (rename DOA_16_ "DOA(16)") (direction OUTPUT)) |
(port (rename DOA_17_ "DOA(17)") (direction OUTPUT)) |
(port (rename DOA_18_ "DOA(18)") (direction OUTPUT)) |
(port (rename DOA_19_ "DOA(19)") (direction OUTPUT)) |
(port (rename DOA_20_ "DOA(20)") (direction OUTPUT)) |
(port (rename DOA_21_ "DOA(21)") (direction OUTPUT)) |
(port (rename DOA_22_ "DOA(22)") (direction OUTPUT)) |
(port (rename DOA_23_ "DOA(23)") (direction OUTPUT)) |
(port (rename DOA_24_ "DOA(24)") (direction OUTPUT)) |
(port (rename DOA_25_ "DOA(25)") (direction OUTPUT)) |
(port (rename DOA_26_ "DOA(26)") (direction OUTPUT)) |
(port (rename DOA_27_ "DOA(27)") (direction OUTPUT)) |
(port (rename DOA_28_ "DOA(28)") (direction OUTPUT)) |
(port (rename DOA_29_ "DOA(29)") (direction OUTPUT)) |
(port (rename DOA_30_ "DOA(30)") (direction OUTPUT)) |
(port (rename DOA_31_ "DOA(31)") (direction OUTPUT)) |
(port (rename DOB_0_ "DOB(0)") (direction OUTPUT)) |
(port (rename DOB_1_ "DOB(1)") (direction OUTPUT)) |
(port (rename DOB_2_ "DOB(2)") (direction OUTPUT)) |
(port (rename DOB_3_ "DOB(3)") (direction OUTPUT)) |
(port (rename DOB_4_ "DOB(4)") (direction OUTPUT)) |
(port (rename DOB_5_ "DOB(5)") (direction OUTPUT)) |
(port (rename DOB_6_ "DOB(6)") (direction OUTPUT)) |
(port (rename DOB_7_ "DOB(7)") (direction OUTPUT)) |
(port (rename DOB_8_ "DOB(8)") (direction OUTPUT)) |
(port (rename DOB_9_ "DOB(9)") (direction OUTPUT)) |
(port (rename DOB_10_ "DOB(10)") (direction OUTPUT)) |
(port (rename DOB_11_ "DOB(11)") (direction OUTPUT)) |
(port (rename DOB_12_ "DOB(12)") (direction OUTPUT)) |
(port (rename DOB_13_ "DOB(13)") (direction OUTPUT)) |
(port (rename DOB_14_ "DOB(14)") (direction OUTPUT)) |
(port (rename DOB_15_ "DOB(15)") (direction OUTPUT)) |
(port (rename DOB_16_ "DOB(16)") (direction OUTPUT)) |
(port (rename DOB_17_ "DOB(17)") (direction OUTPUT)) |
(port (rename DOB_18_ "DOB(18)") (direction OUTPUT)) |
(port (rename DOB_19_ "DOB(19)") (direction OUTPUT)) |
(port (rename DOB_20_ "DOB(20)") (direction OUTPUT)) |
(port (rename DOB_21_ "DOB(21)") (direction OUTPUT)) |
(port (rename DOB_22_ "DOB(22)") (direction OUTPUT)) |
(port (rename DOB_23_ "DOB(23)") (direction OUTPUT)) |
(port (rename DOB_24_ "DOB(24)") (direction OUTPUT)) |
(port (rename DOB_25_ "DOB(25)") (direction OUTPUT)) |
(port (rename DOB_26_ "DOB(26)") (direction OUTPUT)) |
(port (rename DOB_27_ "DOB(27)") (direction OUTPUT)) |
(port (rename DOB_28_ "DOB(28)") (direction OUTPUT)) |
(port (rename DOB_29_ "DOB(29)") (direction OUTPUT)) |
(port (rename DOB_30_ "DOB(30)") (direction OUTPUT)) |
(port (rename DOB_31_ "DOB(31)") (direction OUTPUT)) |
(port (rename DOPA_0_ "DOPA(0)") (direction OUTPUT)) |
(port (rename DOPA_1_ "DOPA(1)") (direction OUTPUT)) |
(port (rename DOPA_2_ "DOPA(2)") (direction OUTPUT)) |
(port (rename DOPA_3_ "DOPA(3)") (direction OUTPUT)) |
(port (rename DOPB_0_ "DOPB(0)") (direction OUTPUT)) |
(port (rename DOPB_1_ "DOPB(1)") (direction OUTPUT)) |
(port (rename DOPB_2_ "DOPB(2)") (direction OUTPUT)) |
(port (rename DOPB_3_ "DOPB(3)") (direction OUTPUT)) |
(port (rename ADDRA_0_ "ADDRA(0)") (direction INPUT)) |
(port (rename ADDRA_1_ "ADDRA(1)") (direction INPUT)) |
(port (rename ADDRA_2_ "ADDRA(2)") (direction INPUT)) |
(port (rename ADDRA_3_ "ADDRA(3)") (direction INPUT)) |
(port (rename ADDRA_4_ "ADDRA(4)") (direction INPUT)) |
(port (rename ADDRA_5_ "ADDRA(5)") (direction INPUT)) |
(port (rename ADDRA_6_ "ADDRA(6)") (direction INPUT)) |
(port (rename ADDRA_7_ "ADDRA(7)") (direction INPUT)) |
(port (rename ADDRA_8_ "ADDRA(8)") (direction INPUT)) |
(port (rename ADDRA_9_ "ADDRA(9)") (direction INPUT)) |
(port (rename ADDRA_10_ "ADDRA(10)") (direction INPUT)) |
(port (rename ADDRA_11_ "ADDRA(11)") (direction INPUT)) |
(port (rename ADDRA_12_ "ADDRA(12)") (direction INPUT)) |
(port (rename ADDRA_13_ "ADDRA(13)") (direction INPUT)) |
(port (rename ADDRA_14_ "ADDRA(14)") (direction INPUT)) |
(port (rename ADDRB_0_ "ADDRB(0)") (direction INPUT)) |
(port (rename ADDRB_1_ "ADDRB(1)") (direction INPUT)) |
(port (rename ADDRB_2_ "ADDRB(2)") (direction INPUT)) |
(port (rename ADDRB_3_ "ADDRB(3)") (direction INPUT)) |
(port (rename ADDRB_4_ "ADDRB(4)") (direction INPUT)) |
(port (rename ADDRB_5_ "ADDRB(5)") (direction INPUT)) |
(port (rename ADDRB_6_ "ADDRB(6)") (direction INPUT)) |
(port (rename ADDRB_7_ "ADDRB(7)") (direction INPUT)) |
(port (rename ADDRB_8_ "ADDRB(8)") (direction INPUT)) |
(port (rename ADDRB_9_ "ADDRB(9)") (direction INPUT)) |
(port (rename ADDRB_10_ "ADDRB(10)") (direction INPUT)) |
(port (rename ADDRB_11_ "ADDRB(11)") (direction INPUT)) |
(port (rename ADDRB_12_ "ADDRB(12)") (direction INPUT)) |
(port (rename ADDRB_13_ "ADDRB(13)") (direction INPUT)) |
(port (rename ADDRB_14_ "ADDRB(14)") (direction INPUT)) |
(port CLKA (direction INPUT)) |
(port CLKB (direction INPUT)) |
(port (rename DIA_0_ "DIA(0)") (direction INPUT)) |
(port (rename DIA_1_ "DIA(1)") (direction INPUT)) |
(port (rename DIA_2_ "DIA(2)") (direction INPUT)) |
(port (rename DIA_3_ "DIA(3)") (direction INPUT)) |
(port (rename DIA_4_ "DIA(4)") (direction INPUT)) |
(port (rename DIA_5_ "DIA(5)") (direction INPUT)) |
(port (rename DIA_6_ "DIA(6)") (direction INPUT)) |
(port (rename DIA_7_ "DIA(7)") (direction INPUT)) |
(port (rename DIA_8_ "DIA(8)") (direction INPUT)) |
(port (rename DIA_9_ "DIA(9)") (direction INPUT)) |
(port (rename DIA_10_ "DIA(10)") (direction INPUT)) |
(port (rename DIA_11_ "DIA(11)") (direction INPUT)) |
(port (rename DIA_12_ "DIA(12)") (direction INPUT)) |
(port (rename DIA_13_ "DIA(13)") (direction INPUT)) |
(port (rename DIA_14_ "DIA(14)") (direction INPUT)) |
(port (rename DIA_15_ "DIA(15)") (direction INPUT)) |
(port (rename DIA_16_ "DIA(16)") (direction INPUT)) |
(port (rename DIA_17_ "DIA(17)") (direction INPUT)) |
(port (rename DIA_18_ "DIA(18)") (direction INPUT)) |
(port (rename DIA_19_ "DIA(19)") (direction INPUT)) |
(port (rename DIA_20_ "DIA(20)") (direction INPUT)) |
(port (rename DIA_21_ "DIA(21)") (direction INPUT)) |
(port (rename DIA_22_ "DIA(22)") (direction INPUT)) |
(port (rename DIA_23_ "DIA(23)") (direction INPUT)) |
(port (rename DIA_24_ "DIA(24)") (direction INPUT)) |
(port (rename DIA_25_ "DIA(25)") (direction INPUT)) |
(port (rename DIA_26_ "DIA(26)") (direction INPUT)) |
(port (rename DIA_27_ "DIA(27)") (direction INPUT)) |
(port (rename DIA_28_ "DIA(28)") (direction INPUT)) |
(port (rename DIA_29_ "DIA(29)") (direction INPUT)) |
(port (rename DIA_30_ "DIA(30)") (direction INPUT)) |
(port (rename DIA_31_ "DIA(31)") (direction INPUT)) |
(port (rename DIB_0_ "DIB(0)") (direction INPUT)) |
(port (rename DIB_1_ "DIB(1)") (direction INPUT)) |
(port (rename DIB_2_ "DIB(2)") (direction INPUT)) |
(port (rename DIB_3_ "DIB(3)") (direction INPUT)) |
(port (rename DIB_4_ "DIB(4)") (direction INPUT)) |
(port (rename DIB_5_ "DIB(5)") (direction INPUT)) |
(port (rename DIB_6_ "DIB(6)") (direction INPUT)) |
(port (rename DIB_7_ "DIB(7)") (direction INPUT)) |
(port (rename DIB_8_ "DIB(8)") (direction INPUT)) |
(port (rename DIB_9_ "DIB(9)") (direction INPUT)) |
(port (rename DIB_10_ "DIB(10)") (direction INPUT)) |
(port (rename DIB_11_ "DIB(11)") (direction INPUT)) |
(port (rename DIB_12_ "DIB(12)") (direction INPUT)) |
(port (rename DIB_13_ "DIB(13)") (direction INPUT)) |
(port (rename DIB_14_ "DIB(14)") (direction INPUT)) |
(port (rename DIB_15_ "DIB(15)") (direction INPUT)) |
(port (rename DIB_16_ "DIB(16)") (direction INPUT)) |
(port (rename DIB_17_ "DIB(17)") (direction INPUT)) |
(port (rename DIB_18_ "DIB(18)") (direction INPUT)) |
(port (rename DIB_19_ "DIB(19)") (direction INPUT)) |
(port (rename DIB_20_ "DIB(20)") (direction INPUT)) |
(port (rename DIB_21_ "DIB(21)") (direction INPUT)) |
(port (rename DIB_22_ "DIB(22)") (direction INPUT)) |
(port (rename DIB_23_ "DIB(23)") (direction INPUT)) |
(port (rename DIB_24_ "DIB(24)") (direction INPUT)) |
(port (rename DIB_25_ "DIB(25)") (direction INPUT)) |
(port (rename DIB_26_ "DIB(26)") (direction INPUT)) |
(port (rename DIB_27_ "DIB(27)") (direction INPUT)) |
(port (rename DIB_28_ "DIB(28)") (direction INPUT)) |
(port (rename DIB_29_ "DIB(29)") (direction INPUT)) |
(port (rename DIB_30_ "DIB(30)") (direction INPUT)) |
(port (rename DIB_31_ "DIB(31)") (direction INPUT)) |
(port (rename DIPA_0_ "DIPA(0)") (direction INPUT)) |
(port (rename DIPA_1_ "DIPA(1)") (direction INPUT)) |
(port (rename DIPA_2_ "DIPA(2)") (direction INPUT)) |
(port (rename DIPA_3_ "DIPA(3)") (direction INPUT)) |
(port (rename DIPB_0_ "DIPB(0)") (direction INPUT)) |
(port (rename DIPB_1_ "DIPB(1)") (direction INPUT)) |
(port (rename DIPB_2_ "DIPB(2)") (direction INPUT)) |
(port (rename DIPB_3_ "DIPB(3)") (direction INPUT)) |
(port ENA (direction INPUT)) |
(port ENB (direction INPUT)) |
(port REGCEA (direction INPUT)) |
(port REGCEB (direction INPUT)) |
(port SSRA (direction INPUT)) |
(port SSRB (direction INPUT)) |
(port (rename WEA_0_ "WEA(0)") (direction INPUT)) |
(port (rename WEA_1_ "WEA(1)") (direction INPUT)) |
(port (rename WEA_2_ "WEA(2)") (direction INPUT)) |
(port (rename WEA_3_ "WEA(3)") (direction INPUT)) |
(port (rename WEB_0_ "WEB(0)") (direction INPUT)) |
(port (rename WEB_1_ "WEB(1)") (direction INPUT)) |
(port (rename WEB_2_ "WEB(2)") (direction INPUT)) |
(port (rename WEB_3_ "WEB(3)") (direction INPUT)) |
(port CASCADEINA (direction INPUT)) |
(port CASCADEINB (direction INPUT)) |
(port CASCADEOUTA (direction OUTPUT)) |
(port CASCADEOUTB (direction OUTPUT)) |
) |
) |
) |
) |
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time)))) |
(cell dpsram_128x16 |
(cellType GENERIC) (view view_1 (viewType NETLIST) |
(interface |
(port ( array ( rename addra "addra(6:0)") 7 ) (direction INPUT)) |
(port ( array ( rename addrb "addrb(6:0)") 7 ) (direction INPUT)) |
(port ( rename clka "clka") (direction INPUT)) |
(port ( rename clkb "clkb") (direction INPUT)) |
(port ( array ( rename dina "dina(15:0)") 16 ) (direction INPUT)) |
(port ( array ( rename dinb "dinb(15:0)") 16 ) (direction INPUT)) |
(port ( rename ena "ena") (direction INPUT)) |
(port ( rename enb "enb") (direction INPUT)) |
(port ( rename wea "wea") (direction INPUT)) |
(port ( rename web "web") (direction INPUT)) |
(port ( array ( rename douta "douta(15:0)") 16 ) (direction OUTPUT)) |
(port ( array ( rename doutb "doutb(15:0)") 16 ) (direction OUTPUT)) |
) |
(contents |
(instance VCC (viewRef view_1 (cellRef VCC (libraryRef xilinxun)))) |
(instance GND (viewRef view_1 (cellRef GND (libraryRef xilinxun)))) |
(instance BU3 |
(viewRef view_1 (cellRef INV (libraryRef xilinxun))) |
) |
(instance BU4 |
(viewRef view_1 (cellRef INV (libraryRef xilinxun))) |
) |
(instance BU5 |
(viewRef view_1 (cellRef INV (libraryRef xilinxun))) |
) |
(instance BU6 |
(viewRef view_1 (cellRef INV (libraryRef xilinxun))) |
) |
(instance BU9 |
(viewRef view_1 (cellRef RAMB16 (libraryRef xilinxun))) |
(property SIM_COLLISION_CHECK (string "NONE")) |
(property DOA_REG (string "0")) |
(property DOB_REG (string "0")) |
(property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_02 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_03 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_04 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_05 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_06 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_07 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_08 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_09 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0A (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0B (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0C (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0D (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0E (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_0F (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_10 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_11 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_12 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_13 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_14 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_15 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_16 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_17 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_18 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_19 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1A (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1B (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1C (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1D (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1E (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_1F (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_20 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_21 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_22 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_23 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_24 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_25 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_26 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_27 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_28 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_29 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2A (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2B (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2C (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2D (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2E (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_2F (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_30 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_31 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_32 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_33 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_34 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_35 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_36 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_37 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_38 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_39 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3A (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3B (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3C (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3D (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3E (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_3F (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INIT_A (string "000000000")) |
(property INIT_B (string "000000000")) |
(property INITP_00 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_01 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_02 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_03 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_04 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_05 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_06 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property INITP_07 (string "0000000000000000000000000000000000000000000000000000000000000000")) |
(property RAM_EXTENSION_A (string "NONE")) |
(property RAM_EXTENSION_B (string "NONE")) |
(property READ_WIDTH_A (string "18")) |
(property READ_WIDTH_B (string "18")) |
(property SRVAL_A (string "000000000")) |
(property SRVAL_B (string "000000000")) |
(property WRITE_MODE_A (string "NO_CHANGE")) |
(property WRITE_MODE_B (string "NO_CHANGE")) |
(property WRITE_WIDTH_A (string "18")) |
(property WRITE_WIDTH_B (string "18")) |
) |
(net N0 |
(joined |
(portRef G (instanceRef GND)) |
(portRef CASCADEINA (instanceRef BU9)) |
(portRef CASCADEINB (instanceRef BU9)) |
(portRef SSRA (instanceRef BU9)) |
(portRef SSRB (instanceRef BU9)) |
(portRef ADDRA_0_ (instanceRef BU9)) |
(portRef ADDRA_1_ (instanceRef BU9)) |
(portRef ADDRA_2_ (instanceRef BU9)) |
(portRef ADDRA_3_ (instanceRef BU9)) |
(portRef ADDRA_11_ (instanceRef BU9)) |
(portRef ADDRA_12_ (instanceRef BU9)) |
(portRef ADDRA_13_ (instanceRef BU9)) |
(portRef ADDRA_14_ (instanceRef BU9)) |
(portRef ADDRB_0_ (instanceRef BU9)) |
(portRef ADDRB_1_ (instanceRef BU9)) |
(portRef ADDRB_2_ (instanceRef BU9)) |
(portRef ADDRB_3_ (instanceRef BU9)) |
(portRef ADDRB_11_ (instanceRef BU9)) |
(portRef ADDRB_12_ (instanceRef BU9)) |
(portRef ADDRB_13_ (instanceRef BU9)) |
(portRef ADDRB_14_ (instanceRef BU9)) |
(portRef DIA_16_ (instanceRef BU9)) |
(portRef DIA_17_ (instanceRef BU9)) |
(portRef DIA_18_ (instanceRef BU9)) |
(portRef DIA_19_ (instanceRef BU9)) |
(portRef DIA_20_ (instanceRef BU9)) |
(portRef DIA_21_ (instanceRef BU9)) |
(portRef DIA_22_ (instanceRef BU9)) |
(portRef DIA_23_ (instanceRef BU9)) |
(portRef DIA_24_ (instanceRef BU9)) |
(portRef DIA_25_ (instanceRef BU9)) |
(portRef DIA_26_ (instanceRef BU9)) |
(portRef DIA_27_ (instanceRef BU9)) |
(portRef DIA_28_ (instanceRef BU9)) |
(portRef DIA_29_ (instanceRef BU9)) |
(portRef DIA_30_ (instanceRef BU9)) |
(portRef DIA_31_ (instanceRef BU9)) |
(portRef DIB_16_ (instanceRef BU9)) |
(portRef DIB_17_ (instanceRef BU9)) |
(portRef DIB_18_ (instanceRef BU9)) |
(portRef DIB_19_ (instanceRef BU9)) |
(portRef DIB_20_ (instanceRef BU9)) |
(portRef DIB_21_ (instanceRef BU9)) |
(portRef DIB_22_ (instanceRef BU9)) |
(portRef DIB_23_ (instanceRef BU9)) |
(portRef DIB_24_ (instanceRef BU9)) |
(portRef DIB_25_ (instanceRef BU9)) |
(portRef DIB_26_ (instanceRef BU9)) |
(portRef DIB_27_ (instanceRef BU9)) |
(portRef DIB_28_ (instanceRef BU9)) |
(portRef DIB_29_ (instanceRef BU9)) |
(portRef DIB_30_ (instanceRef BU9)) |
(portRef DIB_31_ (instanceRef BU9)) |
(portRef DIPA_0_ (instanceRef BU9)) |
(portRef DIPA_1_ (instanceRef BU9)) |
(portRef DIPA_2_ (instanceRef BU9)) |
(portRef DIPA_3_ (instanceRef BU9)) |
(portRef DIPB_0_ (instanceRef BU9)) |
(portRef DIPB_1_ (instanceRef BU9)) |
(portRef DIPB_2_ (instanceRef BU9)) |
(portRef DIPB_3_ (instanceRef BU9)) |
) |
) |
(net (rename N2 "addra(6)") |
(joined |
(portRef (member addra 0)) |
(portRef ADDRA_10_ (instanceRef BU9)) |
) |
) |
(net (rename N3 "addra(5)") |
(joined |
(portRef (member addra 1)) |
(portRef ADDRA_9_ (instanceRef BU9)) |
) |
) |
(net (rename N4 "addra(4)") |
(joined |
(portRef (member addra 2)) |
(portRef ADDRA_8_ (instanceRef BU9)) |
) |
) |
(net (rename N5 "addra(3)") |
(joined |
(portRef (member addra 3)) |
(portRef ADDRA_7_ (instanceRef BU9)) |
) |
) |
(net (rename N6 "addra(2)") |
(joined |
(portRef (member addra 4)) |
(portRef ADDRA_6_ (instanceRef BU9)) |
) |
) |
(net (rename N7 "addra(1)") |
(joined |
(portRef (member addra 5)) |
(portRef ADDRA_5_ (instanceRef BU9)) |
) |
) |
(net (rename N8 "addra(0)") |
(joined |
(portRef (member addra 6)) |
(portRef ADDRA_4_ (instanceRef BU9)) |
) |
) |
(net (rename N9 "addrb(6)") |
(joined |
(portRef (member addrb 0)) |
(portRef ADDRB_10_ (instanceRef BU9)) |
) |
) |
(net (rename N10 "addrb(5)") |
(joined |
(portRef (member addrb 1)) |
(portRef ADDRB_9_ (instanceRef BU9)) |
) |
) |
(net (rename N11 "addrb(4)") |
(joined |
(portRef (member addrb 2)) |
(portRef ADDRB_8_ (instanceRef BU9)) |
) |
) |
(net (rename N12 "addrb(3)") |
(joined |
(portRef (member addrb 3)) |
(portRef ADDRB_7_ (instanceRef BU9)) |
) |
) |
(net (rename N13 "addrb(2)") |
(joined |
(portRef (member addrb 4)) |
(portRef ADDRB_6_ (instanceRef BU9)) |
) |
) |
(net (rename N14 "addrb(1)") |
(joined |
(portRef (member addrb 5)) |
(portRef ADDRB_5_ (instanceRef BU9)) |
) |
) |
(net (rename N15 "addrb(0)") |
(joined |
(portRef (member addrb 6)) |
(portRef ADDRB_4_ (instanceRef BU9)) |
) |
) |
(net (rename N16 "clka") |
(joined |
(portRef clka) |
(portRef CLKA (instanceRef BU9)) |
) |
) |
(net (rename N17 "clkb") |
(joined |
(portRef clkb) |
(portRef CLKB (instanceRef BU9)) |
) |
) |
(net (rename N18 "dina(15)") |
(joined |
(portRef (member dina 0)) |
(portRef DIA_15_ (instanceRef BU9)) |
) |
) |
(net (rename N19 "dina(14)") |
(joined |
(portRef (member dina 1)) |
(portRef DIA_14_ (instanceRef BU9)) |
) |
) |
(net (rename N20 "dina(13)") |
(joined |
(portRef (member dina 2)) |
(portRef DIA_13_ (instanceRef BU9)) |
) |
) |
(net (rename N21 "dina(12)") |
(joined |
(portRef (member dina 3)) |
(portRef DIA_12_ (instanceRef BU9)) |
) |
) |
(net (rename N22 "dina(11)") |
(joined |
(portRef (member dina 4)) |
(portRef DIA_11_ (instanceRef BU9)) |
) |
) |
(net (rename N23 "dina(10)") |
(joined |
(portRef (member dina 5)) |
(portRef DIA_10_ (instanceRef BU9)) |
) |
) |
(net (rename N24 "dina(9)") |
(joined |
(portRef (member dina 6)) |
(portRef DIA_9_ (instanceRef BU9)) |
) |
) |
(net (rename N25 "dina(8)") |
(joined |
(portRef (member dina 7)) |
(portRef DIA_8_ (instanceRef BU9)) |
) |
) |
(net (rename N26 "dina(7)") |
(joined |
(portRef (member dina 8)) |
(portRef DIA_7_ (instanceRef BU9)) |
) |
) |
(net (rename N27 "dina(6)") |
(joined |
(portRef (member dina 9)) |
(portRef DIA_6_ (instanceRef BU9)) |
) |
) |
(net (rename N28 "dina(5)") |
(joined |
(portRef (member dina 10)) |
(portRef DIA_5_ (instanceRef BU9)) |
) |
) |
(net (rename N29 "dina(4)") |
(joined |
(portRef (member dina 11)) |
(portRef DIA_4_ (instanceRef BU9)) |
) |
) |
(net (rename N30 "dina(3)") |
(joined |
(portRef (member dina 12)) |
(portRef DIA_3_ (instanceRef BU9)) |
) |
) |
(net (rename N31 "dina(2)") |
(joined |
(portRef (member dina 13)) |
(portRef DIA_2_ (instanceRef BU9)) |
) |
) |
(net (rename N32 "dina(1)") |
(joined |
(portRef (member dina 14)) |
(portRef DIA_1_ (instanceRef BU9)) |
) |
) |
(net (rename N33 "dina(0)") |
(joined |
(portRef (member dina 15)) |
(portRef DIA_0_ (instanceRef BU9)) |
) |
) |
(net (rename N34 "dinb(15)") |
(joined |
(portRef (member dinb 0)) |
(portRef DIB_15_ (instanceRef BU9)) |
) |
) |
(net (rename N35 "dinb(14)") |
(joined |
(portRef (member dinb 1)) |
(portRef DIB_14_ (instanceRef BU9)) |
) |
) |
(net (rename N36 "dinb(13)") |
(joined |
(portRef (member dinb 2)) |
(portRef DIB_13_ (instanceRef BU9)) |
) |
) |
(net (rename N37 "dinb(12)") |
(joined |
(portRef (member dinb 3)) |
(portRef DIB_12_ (instanceRef BU9)) |
) |
) |
(net (rename N38 "dinb(11)") |
(joined |
(portRef (member dinb 4)) |
(portRef DIB_11_ (instanceRef BU9)) |
) |
) |
(net (rename N39 "dinb(10)") |
(joined |
(portRef (member dinb 5)) |
(portRef DIB_10_ (instanceRef BU9)) |
) |
) |
(net (rename N40 "dinb(9)") |
(joined |
(portRef (member dinb 6)) |
(portRef DIB_9_ (instanceRef BU9)) |
) |
) |
(net (rename N41 "dinb(8)") |
(joined |
(portRef (member dinb 7)) |
(portRef DIB_8_ (instanceRef BU9)) |
) |
) |
(net (rename N42 "dinb(7)") |
(joined |
(portRef (member dinb 8)) |
(portRef DIB_7_ (instanceRef BU9)) |
) |
) |
(net (rename N43 "dinb(6)") |
(joined |
(portRef (member dinb 9)) |
(portRef DIB_6_ (instanceRef BU9)) |
) |
) |
(net (rename N44 "dinb(5)") |
(joined |
(portRef (member dinb 10)) |
(portRef DIB_5_ (instanceRef BU9)) |
) |
) |
(net (rename N45 "dinb(4)") |
(joined |
(portRef (member dinb 11)) |
(portRef DIB_4_ (instanceRef BU9)) |
) |
) |
(net (rename N46 "dinb(3)") |
(joined |
(portRef (member dinb 12)) |
(portRef DIB_3_ (instanceRef BU9)) |
) |
) |
(net (rename N47 "dinb(2)") |
(joined |
(portRef (member dinb 13)) |
(portRef DIB_2_ (instanceRef BU9)) |
) |
) |
(net (rename N48 "dinb(1)") |
(joined |
(portRef (member dinb 14)) |
(portRef DIB_1_ (instanceRef BU9)) |
) |
) |
(net (rename N49 "dinb(0)") |
(joined |
(portRef (member dinb 15)) |
(portRef DIB_0_ (instanceRef BU9)) |
) |
) |
(net (rename N50 "douta(15)") |
(joined |
(portRef (member douta 0)) |
(portRef DOA_15_ (instanceRef BU9)) |
) |
) |
(net (rename N51 "douta(14)") |
(joined |
(portRef (member douta 1)) |
(portRef DOA_14_ (instanceRef BU9)) |
) |
) |
(net (rename N52 "douta(13)") |
(joined |
(portRef (member douta 2)) |
(portRef DOA_13_ (instanceRef BU9)) |
) |
) |
(net (rename N53 "douta(12)") |
(joined |
(portRef (member douta 3)) |
(portRef DOA_12_ (instanceRef BU9)) |
) |
) |
(net (rename N54 "douta(11)") |
(joined |
(portRef (member douta 4)) |
(portRef DOA_11_ (instanceRef BU9)) |
) |
) |
(net (rename N55 "douta(10)") |
(joined |
(portRef (member douta 5)) |
(portRef DOA_10_ (instanceRef BU9)) |
) |
) |
(net (rename N56 "douta(9)") |
(joined |
(portRef (member douta 6)) |
(portRef DOA_9_ (instanceRef BU9)) |
) |
) |
(net (rename N57 "douta(8)") |
(joined |
(portRef (member douta 7)) |
(portRef DOA_8_ (instanceRef BU9)) |
) |
) |
(net (rename N58 "douta(7)") |
(joined |
(portRef (member douta 8)) |
(portRef DOA_7_ (instanceRef BU9)) |
) |
) |
(net (rename N59 "douta(6)") |
(joined |
(portRef (member douta 9)) |
(portRef DOA_6_ (instanceRef BU9)) |
) |
) |
(net (rename N60 "douta(5)") |
(joined |
(portRef (member douta 10)) |
(portRef DOA_5_ (instanceRef BU9)) |
) |
) |
(net (rename N61 "douta(4)") |
(joined |
(portRef (member douta 11)) |
(portRef DOA_4_ (instanceRef BU9)) |
) |
) |
(net (rename N62 "douta(3)") |
(joined |
(portRef (member douta 12)) |
(portRef DOA_3_ (instanceRef BU9)) |
) |
) |
(net (rename N63 "douta(2)") |
(joined |
(portRef (member douta 13)) |
(portRef DOA_2_ (instanceRef BU9)) |
) |
) |
(net (rename N64 "douta(1)") |
(joined |
(portRef (member douta 14)) |
(portRef DOA_1_ (instanceRef BU9)) |
) |
) |
(net (rename N65 "douta(0)") |
(joined |
(portRef (member douta 15)) |
(portRef DOA_0_ (instanceRef BU9)) |
) |
) |
(net (rename N66 "doutb(15)") |
(joined |
(portRef (member doutb 0)) |
(portRef DOB_15_ (instanceRef BU9)) |
) |
) |
(net (rename N67 "doutb(14)") |
(joined |
(portRef (member doutb 1)) |
(portRef DOB_14_ (instanceRef BU9)) |
) |
) |
(net (rename N68 "doutb(13)") |
(joined |
(portRef (member doutb 2)) |
(portRef DOB_13_ (instanceRef BU9)) |
) |
) |
(net (rename N69 "doutb(12)") |
(joined |
(portRef (member doutb 3)) |
(portRef DOB_12_ (instanceRef BU9)) |
) |
) |
(net (rename N70 "doutb(11)") |
(joined |
(portRef (member doutb 4)) |
(portRef DOB_11_ (instanceRef BU9)) |
) |
) |
(net (rename N71 "doutb(10)") |
(joined |
(portRef (member doutb 5)) |
(portRef DOB_10_ (instanceRef BU9)) |
) |
) |
(net (rename N72 "doutb(9)") |
(joined |
(portRef (member doutb 6)) |
(portRef DOB_9_ (instanceRef BU9)) |
) |
) |
(net (rename N73 "doutb(8)") |
(joined |
(portRef (member doutb 7)) |
(portRef DOB_8_ (instanceRef BU9)) |
) |
) |
(net (rename N74 "doutb(7)") |
(joined |
(portRef (member doutb 8)) |
(portRef DOB_7_ (instanceRef BU9)) |
) |
) |
(net (rename N75 "doutb(6)") |
(joined |
(portRef (member doutb 9)) |
(portRef DOB_6_ (instanceRef BU9)) |
) |
) |
(net (rename N76 "doutb(5)") |
(joined |
(portRef (member doutb 10)) |
(portRef DOB_5_ (instanceRef BU9)) |
) |
) |
(net (rename N77 "doutb(4)") |
(joined |
(portRef (member doutb 11)) |
(portRef DOB_4_ (instanceRef BU9)) |
) |
) |
(net (rename N78 "doutb(3)") |
(joined |
(portRef (member doutb 12)) |
(portRef DOB_3_ (instanceRef BU9)) |
) |
) |
(net (rename N79 "doutb(2)") |
(joined |
(portRef (member doutb 13)) |
(portRef DOB_2_ (instanceRef BU9)) |
) |
) |
(net (rename N80 "doutb(1)") |
(joined |
(portRef (member doutb 14)) |
(portRef DOB_1_ (instanceRef BU9)) |
) |
) |
(net (rename N81 "doutb(0)") |
(joined |
(portRef (member doutb 15)) |
(portRef DOB_0_ (instanceRef BU9)) |
) |
) |
(net (rename N82 "ena") |
(joined |
(portRef ena) |
(portRef I (instanceRef BU3)) |
) |
) |
(net (rename N83 "enb") |
(joined |
(portRef enb) |
(portRef I (instanceRef BU4)) |
) |
) |
(net (rename N92 "wea") |
(joined |
(portRef wea) |
(portRef I (instanceRef BU5)) |
) |
) |
(net (rename N93 "web") |
(joined |
(portRef web) |
(portRef I (instanceRef BU6)) |
) |
) |
(net N172 |
(joined |
(portRef O (instanceRef BU3)) |
(portRef ENA (instanceRef BU9)) |
(portRef REGCEA (instanceRef BU9)) |
) |
) |
(net N173 |
(joined |
(portRef O (instanceRef BU4)) |
(portRef ENB (instanceRef BU9)) |
(portRef REGCEB (instanceRef BU9)) |
) |
) |
(net N182 |
(joined |
(portRef O (instanceRef BU5)) |
(portRef WEA_0_ (instanceRef BU9)) |
(portRef WEA_1_ (instanceRef BU9)) |
(portRef WEA_2_ (instanceRef BU9)) |
(portRef WEA_3_ (instanceRef BU9)) |
) |
) |
(net N183 |
(joined |
(portRef O (instanceRef BU6)) |
(portRef WEB_0_ (instanceRef BU9)) |
(portRef WEB_1_ (instanceRef BU9)) |
(portRef WEB_2_ (instanceRef BU9)) |
(portRef WEB_3_ (instanceRef BU9)) |
) |
) |
)))) |
(design dpsram_128x16 (cellRef dpsram_128x16 (libraryRef test_lib)) |
(property X_CORE_INFO (string "blkmemdp_v6_3, Coregen 9.2.04i_ip2")) |
(property PART (string "xc4vlx200-ff1513-11") (owner "Xilinx"))) |
) |