URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

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Rev	Log message	Author	Age	Path
92	This is revision 1.4, revision 1.5 was put there by mistake.	simons	7494d 20h	/
91	Removed files due to new complete testbench.	tadejm	7495d 11h	/
90	Add Flextronics header	avisha	7497d 18h	/
89	adjusted comment + define	dries	7578d 00h	/
88	added clearing the receiver fifo statuses on resets	gorban	7640d 13h	/
87	This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended.	gorban	7670d 15h	/
86	restored include for uart_defines.v in uart_test.v	gorban	7940d 19h	/
85	Updated documentation to include latest changes.	gorban	7974d 10h	/
84	The uart_defines.v file is included again in sources.	gorban	7987d 10h	/
83	Reverted to include uart_defines.v file in other files again.	gorban	7987d 10h	/
82	Updated to work with latest core.	gorban	7994d 08h	/
81	Added lastest additions.	gorban	7994d 08h	/
80	Remove uart_fifo.v because it is replaced by other 2 files.	gorban	7994d 08h	/
79	Bug Fixes: * Possible loss of sync and bad reception of stop bit on slow baud rates fixed. Problem reported by Kenny.Tung. * Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers. Improvements: * Made FIFO's as general inferrable memory where possible. So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx). This saves about 1/3 of the Slice count and reduces P&R and synthesis times. * Added optional baudrate output (baud_o). This is identical to BAUDOUT* signal on 16550 chip. It outputs 16xbit_clock_rate - the divided clock. It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.	gorban	7994d 08h	/
78	This commit was manufactured by cvs2svn to create tag 'rel_1'.		8147d 14h	/
77	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		8147d 14h	/
76	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		8147d 14h	/
75	Endian define added. Big Byte Endian is selected by default.	mohor	8147d 14h	/
74	tf_overrun signal was disabled since it was not used	gorban	8152d 16h	/
73	major bug in 32-bit mode that prevented register access fixed.	gorban	8159d 15h	/

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Subversion Repositories uart16550

[/] - Rev 92

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