OpenCores
URL https://opencores.org/ocsvn/mkjpeg/mkjpeg/trunk

Subversion Repositories mkjpeg

[/] [mkjpeg/] [trunk/] [design/] [top/] [JpegEnc.vhd] - Diff between revs 32 and 34

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 32 Rev 34
Line 93... Line 93... 
  signal jpg_iram_rdata     : std_logic_vector(23 downto 0);
 
  signal jpg_iram_rdata     : std_logic_vector(23 downto 0);
 
  signal fdct_start         : std_logic;
 
  signal fdct_start         : std_logic;
 
  signal fdct_ready         : std_logic;
 
  signal fdct_ready         : std_logic;
 
  signal zig_start          : std_logic;
 
  signal zig_start          : std_logic;
 
  signal zig_ready          : std_logic;
 
  signal zig_ready          : std_logic;
 
 
 
  signal qua_start          : std_logic;
 
 
 
  signal qua_ready          : std_logic;
 
  signal rle_start          : std_logic;
 
  signal rle_start          : std_logic;
 
  signal rle_ready          : std_logic;
 
  signal rle_ready          : std_logic;
 
  signal huf_start          : std_logic;
 
  signal huf_start          : std_logic;
 
  signal huf_ready          : std_logic;
 
  signal huf_ready          : std_logic;
 
  signal bs_start           : std_logic;
 
  signal bs_start           : std_logic;
Line 105... Line 107... 
  signal zz_rd_addr         : std_logic_vector(5 downto 0);
 
  signal zz_rd_addr         : std_logic_vector(5 downto 0);
 
  signal zz_data            : std_logic_vector(11 downto 0);
 
  signal zz_data            : std_logic_vector(11 downto 0);
 
  signal rle_buf_sel        : std_logic;
 
  signal rle_buf_sel        : std_logic;
 
  signal rle_rdaddr         : std_logic_vector(5 downto 0);
 
  signal rle_rdaddr         : std_logic_vector(5 downto 0);
 
  signal rle_data           : std_logic_vector(11 downto 0);
 
  signal rle_data           : std_logic_vector(11 downto 0);
 
 
 
  signal qua_buf_sel        : std_logic;
 
 
 
  signal qua_rdaddr         : std_logic_vector(5 downto 0);
 
 
 
  signal qua_data           : std_logic_vector(11 downto 0);
 
  signal huf_buf_sel        : std_logic;
 
  signal huf_buf_sel        : std_logic;
 
  signal huf_rdaddr         : std_logic_vector(5 downto 0);
 
  signal huf_rdaddr         : std_logic_vector(5 downto 0);
 
  signal huf_rden           : std_logic;
 
  signal huf_rden           : std_logic;
 
  signal huf_runlength      : std_logic_vector(3 downto 0);
 
  signal huf_runlength      : std_logic_vector(3 downto 0);
 
  signal huf_size           : std_logic_vector(3 downto 0);
 
  signal huf_size           : std_logic_vector(3 downto 0);
Line 120... Line 125... 
  signal bs_packed_byte     : std_logic_vector(7 downto 0);
 
  signal bs_packed_byte     : std_logic_vector(7 downto 0);
 
  signal huf_fifo_empty     : std_logic;
 
  signal huf_fifo_empty     : std_logic;
 
  signal zz_rden            : std_logic;
 
  signal zz_rden            : std_logic;
 
  signal fdct_sm_settings   : T_SM_SETTINGS;
 
  signal fdct_sm_settings   : T_SM_SETTINGS;
 
  signal zig_sm_settings    : T_SM_SETTINGS;
 
  signal zig_sm_settings    : T_SM_SETTINGS;
 
 
 
  signal qua_sm_settings    : T_SM_SETTINGS;
 
  signal rle_sm_settings    : T_SM_SETTINGS;
 
  signal rle_sm_settings    : T_SM_SETTINGS;
 
  signal huf_sm_settings    : T_SM_SETTINGS;
 
  signal huf_sm_settings    : T_SM_SETTINGS;
 
  signal bs_sm_settings     : T_SM_SETTINGS;
 
  signal bs_sm_settings     : T_SM_SETTINGS;
 
  signal cmp_max            : std_logic_vector(1 downto 0);
 
  signal cmp_max            : std_logic_vector(1 downto 0);
 
  signal image_size_reg     : std_logic_vector(31 downto 0);
 
  signal image_size_reg     : std_logic_vector(31 downto 0);
Line 241... Line 247... 
        -- ZIGZAG
 
        -- ZIGZAG
 
        zig_start          => zig_start,
 
        zig_start          => zig_start,
 
        zig_ready          => zig_ready,
 
        zig_ready          => zig_ready,
 
        zig_sm_settings    => zig_sm_settings,
 
        zig_sm_settings    => zig_sm_settings,
 
 
 
 
 
 
 
        -- Quantizer
 
 
 
        qua_start          => qua_start,
 
 
 
        qua_ready          => qua_ready,
 
 
 
        qua_sm_settings    => qua_sm_settings,
 
 
 
 
 
        -- RLE
 
        -- RLE
 
        rle_start          => rle_start,
 
        rle_start          => rle_start,
 
        rle_ready          => rle_ready,
 
        rle_ready          => rle_ready,
 
        rle_sm_settings    => rle_sm_settings,
 
        rle_sm_settings    => rle_sm_settings,
 
 
 
 
Line 310... Line 321... 
        -- CTRL
 
        -- CTRL
 
        start_pb           => zig_start,
 
        start_pb           => zig_start,
 
        ready_pb           => zig_ready,
 
        ready_pb           => zig_ready,
 
        zig_sm_settings    => zig_sm_settings,
 
        zig_sm_settings    => zig_sm_settings,
 
 
 
 
 
        -- RLE
 
        -- Quantizer
 
        rle_buf_sel        => rle_buf_sel,
 
        qua_buf_sel        => qua_buf_sel,
 
        rle_rdaddr         => rle_rdaddr,
 
        qua_rdaddr         => qua_rdaddr,
 
        rle_data           => rle_data,
 
        qua_data           => qua_data,
 
 
 
 
 
        -- FDCT
 
        -- FDCT
 
        fdct_buf_sel       => zz_buf_sel,
 
        fdct_buf_sel       => zz_buf_sel,
 
        fdct_rd_addr       => zz_rd_addr,
 
        fdct_rd_addr       => zz_rd_addr,
 
        fdct_data          => zz_data,
 
        fdct_data          => zz_data,
 
        fdct_rden          => zz_rden,
 
        fdct_rden          => zz_rden
 
 
 
    );
 
 
 
 
 
 
 
  -------------------------------------------------------------------
 
 
 
  -- Quantizer top level
 
 
 
  -------------------------------------------------------------------
 
 
 
  U_QUANT_TOP : entity work.QUANT_TOP
 
 
 
  port map
 
 
 
  (
 
 
 
        CLK                => CLK,
 
 
 
        RST                => RST,
 
 
 
        -- CTRL
 
 
 
        start_pb           => qua_start,
 
 
 
        ready_pb           => qua_ready,
 
 
 
        qua_sm_settings    => qua_sm_settings,
 
 
 
 
 
 
 
        -- RLE
 
 
 
        rle_buf_sel        => rle_buf_sel,
 
 
 
        rle_rdaddr         => rle_rdaddr,
 
 
 
        rle_data           => rle_data,
 
 
 
 
 
 
 
        -- ZIGZAG
 
 
 
        zig_buf_sel        => qua_buf_sel,
 
 
 
        zig_rd_addr        => qua_rdaddr,
 
 
 
        zig_data           => qua_data,
 
 
 
 
 
        -- HOST
 
        -- HOST
 
        qdata              => qdata,
 
        qdata              => qdata,
 
        qaddr              => qaddr,
 
        qaddr              => qaddr,
 
        qwren              => qwren
 
        qwren              => qwren
Line 349... Line 384... 
        huf_size           => huf_size,
 
        huf_size           => huf_size,
 
        huf_amplitude      => huf_amplitude,
 
        huf_amplitude      => huf_amplitude,
 
        huf_dval           => huf_dval,
 
        huf_dval           => huf_dval,
 
        huf_fifo_empty     => huf_fifo_empty,
 
        huf_fifo_empty     => huf_fifo_empty,
 
 
 
 
 
        -- ZIGZAG
 
        -- Quantizer
 
        zig_buf_sel        => rle_buf_sel,
 
        qua_buf_sel        => rle_buf_sel,
 
        zig_rd_addr        => rle_rdaddr,
 
        qua_rd_addr        => rle_rdaddr,
 
        zig_data           => rle_data,
 
        qua_data           => rle_data,
 
 
 
 
 
        -- HostIF
 
        -- HostIF
 
        sof                => sof
 
        sof                => sof
 
    );
 
    );
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.