/**********************************************************************
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/**********************************************************************
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* File : fht_8x8_core.v
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* File : fht_8x8_core.v
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* Author: Ivan Rezki
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* Author: Ivan Rezki
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* email : irezki@gmail.com
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* email : irezki@gmail.com
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* Topic : RTL Core
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* Topic : RTL Core
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* 2-Dimensional Fast Hartley Transform
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* 2-Dimensional Fast Hartley Transform
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*
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*
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* Function: Fast Hartley Transform ButterFly Unit
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* Function: Fast Hartley Transform ButterFly Unit
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*
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*
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* RIGHT TO USE: This code example, or any portion thereof, may be
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* RIGHT TO USE: This code example, or any portion thereof, may be
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* used and distributed without restriction, provided that this entire
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* used and distributed without restriction, provided that this entire
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* comment block is included with the example.
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* comment block is included with the example.
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*
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*
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* DISCLAIMER: THIS CODE EXAMPLE IS PROVIDED "AS IS" WITHOUT WARRANTY
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* DISCLAIMER: THIS CODE EXAMPLE IS PROVIDED "AS IS" WITHOUT WARRANTY
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* OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED
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* OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED
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* TO WARRANTIES OF MERCHANTABILITY, FITNESS OR CORRECTNESS. IN NO
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* TO WARRANTIES OF MERCHANTABILITY, FITNESS OR CORRECTNESS. IN NO
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* EVENT SHALL THE AUTHOR OR AUTHORS BE LIABLE FOR ANY DAMAGES,
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* EVENT SHALL THE AUTHOR OR AUTHORS BE LIABLE FOR ANY DAMAGES,
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* INCLUDING INCIDENTAL OR CONSEQUENTIAL DAMAGES, ARISING OUT OF THE
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* INCLUDING INCIDENTAL OR CONSEQUENTIAL DAMAGES, ARISING OUT OF THE
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* USE OF THIS CODE.
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* USE OF THIS CODE.
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**********************************************************************/
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**********************************************************************/
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module fht_bfly(
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module fht_bfly(
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rstn,
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rstn,
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clk,
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clk,
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valid,
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valid,
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a,
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a,
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b,
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b,
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c,
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c,
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d
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d
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);
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);
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parameter N = 8;
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parameter N = 8;
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input rstn;
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input rstn;
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input clk;
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input clk;
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input valid;
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input valid;
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input [N-1:0] a; // input
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input [N-1:0] a; // input
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input [N-1:0] b; // input
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input [N-1:0] b; // input
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output [N :0] c; // additive output
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output [N :0] c; // additive output
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output [N :0] d; // subtractive output
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output [N :0] d; // subtractive output
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reg [N-1:0] a_FF;
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reg [N-1:0] a_FF;
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always @(posedge clk)
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always @(posedge clk)
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if (!rstn) a_FF <= #1 0;
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if (!rstn) a_FF <= #1 0;
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else if (valid) a_FF <= #1 a;
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else if (valid) a_FF <= #1 a;
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reg [N-1:0] b_FF;
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reg [N-1:0] b_FF;
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always @(posedge clk)
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always @(posedge clk)
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if (!rstn) b_FF <= #1 0;
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if (!rstn) b_FF <= #1 0;
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else if (valid) b_FF <= #1 b;
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else if (valid) b_FF <= #1 b;
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assign c = rca_N(a_FF,b_FF);
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assign c = rca_N(a_FF,b_FF);
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assign d = rca_N(a_FF,twos_complement(b_FF));
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assign d = rca_N(a_FF,twos_complement(b_FF));
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// +--------------------------------------------------+ \\
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// +--------------------------------------------------+ \\
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// +----------- Function's Description Part ----------+ \\
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// +----------- Function's Description Part ----------+ \\
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// +--------------------------------------------------+ \\
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// +--------------------------------------------------+ \\
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// Full Adder
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// Full Adder
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function [1:0] full_adder;
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function [1:0] full_adder;
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input a, b, ci;
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input a, b, ci;
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reg co, s;
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reg co, s;
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begin
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begin
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s = (a ^ b ^ ci);
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s = (a ^ b ^ ci);
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co = (a & b) | (ci & (a ^ b));
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co = (a & b) | (ci & (a ^ b));
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full_adder = {co,s};
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full_adder = {co,s};
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end
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end
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endfunction
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endfunction
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// Half Adder, i.e. without carry in
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// Half Adder, i.e. without carry in
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function [1:0] half_adder;
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function [1:0] half_adder;
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input a, b;
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input a, b;
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reg co, s;
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reg co, s;
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begin
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begin
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s = (a ^ b);
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s = (a ^ b);
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co = (a & b);
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co = (a & b);
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half_adder = {co,s};
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half_adder = {co,s};
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end
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end
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endfunction
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endfunction
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// Ripple Carry Adder - rca
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// Ripple Carry Adder - rca
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// Input vector = N bits
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// Input vector = N bits
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// Output vector = N + 1 bits
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// Output vector = N + 1 bits
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function [N:0] rca_N;
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function [N:0] rca_N;
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// parameter N = 8;
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// parameter N = 8;
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input [N-1:0] a;
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input [N-1:0] a;
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input [N-1:0] b;
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input [N-1:0] b;
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reg [N-1:0] co,sum;
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reg [N-1:0] co,sum;
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begin : RCA // RIPPLE_CARRY_ADDER
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begin : RCA // RIPPLE_CARRY_ADDER
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integer i;
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integer i;
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//for (i = 0; i <= N; i = i + 1)
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//for (i = 0; i <= N; i = i + 1)
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for (i = 0; i < N; i = i + 1)
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for (i = 0; i < N; i = i + 1)
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if (i == 0)
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if (i == 0)
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{co[i],sum[i]} = half_adder(a[i],b[i]);
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{co[i],sum[i]} = half_adder(a[i],b[i]);
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else
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else
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{co[i],sum[i]} = full_adder(a[i],b[i],co[i-1]);
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{co[i],sum[i]} = full_adder(a[i],b[i],co[i-1]);
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rca_N[N-1:0] = sum;
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rca_N[N-1:0] = sum;
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// MSB is a sign bit
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// MSB is a sign bit
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rca_N[N] = (a[N-1]==b[N-1]) ? co[N-1] : sum[N-1];
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rca_N[N] = (a[N-1]==b[N-1]) ? co[N-1] : sum[N-1];
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end
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end
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endfunction
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endfunction
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function [N-1:0] twos_complement;
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function [N-1:0] twos_complement;
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input [N-1:0] a;
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input [N-1:0] a;
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reg [N-1:0] ainv;
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reg [N-1:0] ainv;
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reg [N:0] plus1;
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reg [N:0] plus1;
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begin
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begin
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ainv = ~a;
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ainv = ~a;
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plus1 = rca_N(ainv,{{N-1{1'b0}},1'b1});
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plus1 = rca_N(ainv,{{N-1{1'b0}},1'b1});
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// pragma coverage block = off
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// synopsys translate_off
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// synopsys translate_off
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// The only problem is absolute minumum negative value
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// The only problem is absolute minumum negative value
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if (a == {1'b1, {N-1{1'b0}}}) $display("--->>> 2's complement ERROR - absolute minumum negative value");
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if (a == {1'b1, {N-1{1'b0}}})
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$display("--->>> 2's complement ERROR - absolute minimum negative value: %0b\n\t %m",a);
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// synopsys translate_on
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// synopsys translate_on
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// pragma coverage block = on
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twos_complement = plus1[N-1:0];
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twos_complement = plus1[N-1:0];
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end
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end
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endfunction
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endfunction
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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// Update Log:
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// 27 Jul. 2011
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// added pragmas for coverage
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No newline at end of file
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No newline at end of file
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