OpenCores
URL https://opencores.org/ocsvn/two_dimensional_fast_hartley_transform/two_dimensional_fast_hartley_transform/trunk

Subversion Repositories two_dimensional_fast_hartley_transform

[/] [two_dimensional_fast_hartley_transform/] [trunk/] [signed_mult_const_asic.v] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 irezki
//
2
// File: signed_mult_const_asic.v
3
// Author: Ivan Rezki
4
// Topic: RTL Core
5
//                2-Dimensional Fast Hartley Transform
6
//
7
 
8
// Signed Multiplier - constant sqrt(2) = 1.41421
9
// 1.41421*a = (256*1.41421)*a/256 = 362.03776*a/256 = 362*a/256
10
// product = 362*a/2^8
11
 
12
module signed_mult_const_asic (
13
        rstn,
14
        clk,
15
        valid,
16
        a,
17
        p
18
);
19
 
20
parameter               N = 8;
21
input                   rstn;
22
input                   clk;
23
input                   valid;
24
input  [N-1:0] a; // variable - positive/negative
25
output [N  :0] p; // product output
26
 
27
// FHT constant
28
wire [8:0] mult_constant; // always positive
29
assign mult_constant = 9'd362;
30
 
31
reg [N-1:0] a_FF;
32
always @(posedge clk)
33
if              (!rstn) a_FF <= #1 0;
34
else if (valid) a_FF <= #1 a;
35
 
36
// Convert into 2's complement if (a_FF) is negative
37
wire [N-1:0] b;
38
assign b = a_FF[N-1] ? {~a_FF[N-1:0] + {{N-1{1'b0}},1'b1} } : a_FF[N-1:0];
39
 
40
// Multiply 2 positive numbers 
41
// b[N-2:0] * mult_constant[8:0]
42
// output result mult_wo_sign
43
// N-2+1 - number of (b) bits
44
// 8+1   - number of mult_constant bits
45
// N-2+1+8+1 - number of bits on the output
46
// = N+8 = [N+7:0]
47
wire [N+7:0] mult_wo_sign; // mult without sign
48
assign mult_wo_sign = b[N-2:0]*mult_constant;
49
 
50
// Divide on 256 - [N+7-8:0] = [N-1:0]
51
wire [N-1:0] div256; // divided 256
52
assign div256 = mult_wo_sign >> 8;
53
 
54
assign p = a_FF[N-1] ?
55
                                        {1'b1,{~div256[N-1:0] + {{N-1{1'b0}},1'b1}} } :
56
                                        {1'b0,  div256[N-1:0]}
57
                                        ;
58
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.