Hi John,
Thanks for the serial divider routine. It works very well. I concur with Harold's findings. I was experimenting with the routine to reduce the number of XST synthesis warnings I got. I thought you might be interested in my notesThanks,
Bob S. -----------------------------------------------------
// Include S_PP in width declaration of grand_divisor to reduce synthesis warnings
reg [M_PP+N_PP+R_PP-S_PP-2:0] grand_divisor;
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// Include S_PP in width declaration of subtract_node to reduce synthesis warnings
wire [M_PP+N_PP+R_PP-S_PP-1:0] subtract_node; // Subtract node has extra "sign" bit
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// Include S_PP in width declaration of divisor_node to reduce synthesis warnings
wire [M_PP+N_PP+R_PP-S_PP-2:0] divisor_node; // Shifted version of grand divisor
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// Include S_PP in width declaration of quotient_reg to reduce synthesis warnings
reg [M_PP+R_PP-S_PP-1:0] quotient_reg; // Used exclusively for the held output -----------------------------------------------------
// Include S_PP in width declaration of quotient_node to reduce synthesis warnings
wire [M_PP+R_PP-S_PP-1:0] quotient_node; // Shifted version of quotient
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// From: assign divisor_node = {1'b0,grand_divisor[M_PP+N_PP+R_PP-2:1]};
// To: assign divisor_node = {1'b0,grand_divisor[M_PP+N_PP+R_PP-S_PP-2:1]};
// From: if (~subtract_node[M_PP+N_PP+R_PP-1]) grand_dividend <= subtract_node;
// To: if (~subtract_node[M_PP+N_PP+R_PP-S_PP-1]) grand_dividend <= subtract_node;
// From: assign divisor_node = {1'b0,grand_divisor[M_PP+N_PP+R_PP-2:1]};
// To: assign divisor_node = {1'b0,grand_divisor[M_PP+N_PP+R_PP-S_PP-2:1]};
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