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    Overview :: VHDL :: verilog :: News :: Downloads :: Tracker    

    CAN Protocol Controller: Tracker : Register Assignment

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      Register Assignment

    Type REQUEST
    Status CLOSED
    Top
    hallo,
    i have some questions about the registers.
    It seems like the Register assignment of the Pelican SJA1000. It was same from Register 1 to Register 7, and from Register 10 to 19 was tx_data_0 to tx_data_9, from Register 20 to Register 29 the Rx_data_0 to Rx_data_9 and Register 31 was clock_divider Register. Was ist right? and what was the use of register 8,9,30? and are there also any other registers?
    thanks for the answers in advance.

     
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    Submited date 30-May-2004
    Submited by kewangke@w...
     
    Assigned date
    Assigned to
     
    Closed date 08-Jun-2004
    Closed by Igor Mohor

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    Comments

    by anshul.johari@g... on 01-Dec-2005
    Hi There is no design doc attahced with this Project. Please tell me from where i can get the design Doc? Thanks Regards Anshul
     
    by Igor Mohor on 08-Jun-2004
    Hi. Register set is the same as in SJA1000 with few exceptions: Registers at the following addresses don’t exist: 8, 9 and 30. Bits related to the power down mode (sleep) and wake-up don’t exist. Best regards, Igor M.
     

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