LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Overview :: VHDL :: verilog :: News :: Downloads :: Tracker    

    CAN Protocol Controller: Tracker : Research Engineer.

    Monitor this item

    You will be notified via email when status of this item is changed or if somebody adds a comment.

    Your email

      Research Engineer.

    Type IDEA
    Status CLOSED
    Top
    Although the Verilog source looks to be well structured, it is still very difficult to follow.
    The SJA1000 documentation is good to describe the operation of the controller but I feel some additional code specific documentation is needed in order for this CAN Controller to be useful to the designer.
    Even some documentation on the interfacing and synthesis would be helpful.

     
    Stats

    1 people are monitoring this item

    Progress
     
    Submited date 07-Apr-2004
    Submited by david.m.kenny@n...
     
    Assigned date
    Assigned to
     
    Closed date 23-Jan-2007
    Closed by Igor Mohor

    Top

    Comments

    by Igor Mohor on 23-Jan-2007
    For documentation take SJA1000 from Philips.
     
    by Igor Mohor on 23-Jan-2007
    For documentation take SJA1000 from Philips.
     

    Add your comment

    Your email:

    Retype key:
    Top

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.