Overview :: News :: Downloads :: Tracker

AVR Core: Tracker : "ret" bug Monitor this item You will be notified via email when status of this item is changed or if somebody adds a comment. Your email   "ret" bug Type BUG Status OPENED In my simulation,I found the instruction pair of "rcall" and "ret" has some bugs. In Modelsim,after "rcall" the fuction, the instruction "ret" make the "pc" back to 0x0000, not the position after the "rcall" in the program. In "AVR studio" ,there is not this problem. I have not analysed the source code carefully now, And I'll do it later. Hope your reply! Thank you! Yours Mark 2008.2.27.   Stats 2 people are monitoring this item Progress   Submited date 27-Feb-2008 Submited by Shen Zhi   Assigned date Assigned to   Closed date Closed by Comments by Rasmus Olsen on 06-Aug-2008 Can you publish the source for the code that are producing the bug?   by Dave Webb on 06-Aug-2008 Hi Mark, I just implemented the core on an Altera FPGA. I was able to compute some Fibanacci numbers using a recursive algorithm (this involves lots of rcall and ret). My design behaved well in the simulator and on target hardware. Have you done further investigations? Otherwise I think the bug can be closed know. Kind regards Dave   Add your comment Your email: Retype key: