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T65 CPU: Overview Details Name: t65 Created: 05-Nov-2002 13:10:36 Updated: 02-Aug-2008 15:22:20 CVS: browse Other project properties Category :: Microprocessor Language :: VHDL Phaze :: FPGA proven Development status :: Production/Stable Project maintainers MikeJ Daniel Wallner Statistics view Description Configurable cpu core that supports 6502, 65C02 and 65C816 instruction sets. A SoC debug system with ROM, RAM and two 16450 UARTs is included in the distribution. It is possible to run the NoICE debugger on this system. Batch files for runnning XST and Leonardo synthesis can be found in syn/xilinx/run/. Check these scripts to see how to use the included VHDL ROM generators. Before you can run the scripts you need to compile hex2rom and xrom or download binaries from here. You must also replace one of the hex files in sw/ or change the batch files to use another hex file. Browse source code here. Download latest tarball here. Features 6502 NMOS mode is cycle accurate, including dummy read and writes Decimal mode is supported Status NMOS 6502 mode supports all documented instructions 65C02 and 65C816 modes are incomplete Complete enough to run EhBASIC The standard 6502 core is cycle accurate and used in a wide number of projects