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SPI controller core: Overview Details Name: spi Created: 12-Jun-2002 16:20:09 Updated: 13-Feb-2008 07:19:48 CVS: browse Other project properties Category :: Communication controller Phaze :: FPGA proven Standard :: Wishbone compliant core Development status :: Production/Stable Project maintainers Simon Srot Statistics view Opened bugs project has opened bugs Description SPI (Serial Peripheral Interface) is serial, synchronous, full duplex communication protocol. It is widely used as a board-level interface between different devices such as microcontrollers, DACs, ADCs and others. This core is SPI/Microwire compliant master serial communication controller with additional functionality. Features Full duplex synchronous serial data transfer Variable length of transfer word up to 32 bits MSB or LSB first data transfer Rx and Tx on both rising or falling edge of serial clock independently 8 slave select lines Fully static synchronous design with one clock domain Technology independent Verilog Fully synthesizable Status Tested in FPGA