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SPDIF Interface: Overview Details Name: spdif_interface Created: 12-Apr-2004 16:42:54 Updated: 14-Oct-2007 15:38:44 CVS: browse, lint reports Other project properties Category :: Communication controller Language :: VHDL License :: LGPL Phaze :: FPGA proven Standard :: Wishbone compliant core Development status :: Production/Stable Project maintainers Geir Drange Statistics view Description The SPDIF interface (Standard IEC958 "Digital audio interface") allows transmission of digital audio signals between devices in a digital format. The goal of this project is to allow a controller/cpu with Wishbone interface to transmit and receive digital audio. Features Separate transmitter and receiver Dual sample buffer architecture with configurable buffer size Access to channel status and subframe bits Supports both 16bit and 32bit data bus Status SPDIF Interface V1.1 has been released.