Overview :: News :: Downloads :: Tracker :: Discussions (cores)

Simple FM Receiver: Overview Details Name: simple_fm_receiver Created: 03-Jan-2005 08:33:23 Updated: 10-Aug-2008 11:21:32 CVS: browse Other project properties Category :: Other Language :: VHDL Phaze :: FPGA proven Development status :: Production/Stable Project maintainers Arif Endro Nugroho Statistics view Simple FM Receiver Simple implementation of FM Receiver to demodulate square wave signal modulated in FM. This design uses PLL to demodulate FM modulated signal. Features Synthesizable This design can be synthesize using Xilinx 6.3i This design also can be synthesize using Alliance 5.0 not fully tested. Simple Use it to understand PLL to see how FM Receiver works. Good for introduction in design process. Modular design, can be use for other design.