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Quadrature Decoder / Counter: Overview Details Name: quadraturecount Created: 23-Dec-2003 11:13:29 Updated: 23-Apr-2004 00:27:44 CVS: browse Other project properties Category :: Communication controller Language :: VHDL License :: GPL Phaze :: FPGA proven Development status :: Production/Stable Project maintainers Steve Franks Statistics view Description This is a very simple project for reading a quadrature device, such as an optical encoder. The counter is initialized to zero, and then counts up and down when valid quadrature is present at the inputs Features Simple VHDL for beginners; well documented; shows use of hierarchical design. Count limited only by bit length of counter vector; simple to count very large values VHDL Implementation of Xilinx application note #012 (xapp012.pdf) NPL project file for immediate evaluation in Xilinx ISE/Webpack tools Questions/Comments: http://www.franks-development.com Project Contents QuadratureCounter.vhd, top-level VHDL QuadratureDecoder.vhd, sub-level file Quadrature.npl, Xilinx project file for ISE/Webpack Quadrature.ucf, optional constraints file for pin assignment