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PWM/Timer/Counter (PTC) Core: Overview Details Name: ptc Created: 25-Sep-2001 10:15:03 Updated: 17-Nov-2006 22:13:22 CVS: browse Other project properties Category :: Other Standard :: Wishbone compliant core Development status :: Production/Stable Project maintainers Damjan Lampret Statistics view Description PWM/Timer/Counter (PTC) IP core is a user-programmable PWM, Timer and Counter controller. Its use is to implement functions like Pulse Width Modulation (PWM), timer and counter facilities. Features The following lists the main features of PTC IP core: 32-bit counter/timer facility single-run or continues run of PTC counter Programmable PWM mode System clock and external clock sources for timer functionality HI/LO Reference and Capture registers Three-state control for PWM output driver PWM/Timer/Counter functionalities can cause an interrupt to the CPU WISHBONE SoC Interconnection Rev. B compliant interface More information about the WISHBONE SoC and a full specification can be found here. For further information, questions and general discussions related to the PTC core, please visit the Cores Mailing list. Status Verilog RTL and verification suite under development The Specification is complete: ptc_spec.pdf (see Downloads)