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openVeriFLA - FPGA logic analyzer: openVeriFLA home page Details Name: openverifla Created: 31-Jul-2007 20:57:20 Updated: 03-Mar-2008 07:41:34 CVS: browse Other project properties Category :: Library Language :: Verilog License :: GPL Phaze :: FPGA proven Development status :: Production/Stable Project maintainers Laurentiu Cristian Duca Statistics view openVeriFLA - FPGA logic analyzer openVeriFLA is an FPGA integrated logic analyzer. It can be used for in-circuit debugging and verification of the FPGA based applications. The FPGA part is written in verilog. The PC part is written in java and is platform independent. Being simple and well documented, the openVeriFLA library is well suited for didactical purposes and academic use. For more information, please unzip the project archive and read the reference manual. Features on-the-fly capture, graphical display, testing automation Status ready to use The FPGA capture of a keyboard controller signals