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Memory mapped LCD Controller (KS0073): Overview Details Name: lcd1 Created: 17-Jun-2008 07:10:55 Updated: 17-Jun-2008 15:34:17 CVS: browse Other project properties Category :: Video controller Language :: VHDL License :: LGPL Phaze :: FPGA proven Development status :: Production/Stable Project maintainers Dimo Pepelyashev Statistics view Description Simple memory mapped, character type dot matrix LCD controller for interfacing the Samsung's KS0073. The controller supports the 40SEG extension driver providing a 4-line x 20 character display. It uses a memory mapped 4x20x8 bit matrix, transformed in real-time to the display. It completely takes the responsibility for sending the appropriate sequences of commands to the KS0073. The higher layer needs only to take care of the content of the matrix. This makes its implementation as a microcontroller peripheral unit very comfortable. Features generic parameterizable features Timing parameters cursor modes additional files and scripts testbench written in VHDL Makefile for synthesis with XST (Xilinx) simulation with Modelsim (Mentor Graphics) Status The project is completed, but further improvements are always welcome. The project is written after only 3 months of VHDL experience, so even though verified, extra caution is required when using it in serious projects.