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HyperMTA: Overview Details Name: hmta Created: 28-Mar-2002 11:03:00 Updated: 27-Apr-2002 09:10:35 CVS: browse Other project properties Category :: Microprocessor Development status :: Planning Project maintainers Ali Mashtizadeh ssssssss harshit suri Darrin Patek Nihar Shah yyzbest Statistics view Description HyperMTA is a multithreaded processor capable of having up to 256 threads. In today's super computing/high end world more and more processors are going to multithreading to get a performance benefit. More and more applications are also becoming multithreaded and for that reason we are designing a super computing/high end computing processor and its chip sets. The system is organized in such a way that each processor will interface to one memory router. Each memory router connects to several other memory routers making it possible to access any of a number of memory banks instantly. The design also enables us to implement a memory routing system that will take many clock cycles to access. Each processor is implemented with a vliw instruction set and contains no cache in order to prevent corruption of data between cross accesses to memory banks. Though each memory router has a cache of it's own current memory bank. This system will make for an easy to implement high speed/high performance computer. When the chips are finished we will design example schematics for using xilinx fpga's to implement such a computer. We will also take on writing the compiler/assembler and an operating system for this chip. Status Preliminary Specifications available on CVS just checkout the hmta directory or visit: http://www.opencores.org/cvsweb.shtml/hmta/docs/ Comments are wanted: ali@a... Much is missing, mainly the little details that make all the difference ;) but I will post it ASAP. I have little snippets that I have typed about things and the instruction set, the rest of the specifications is still in my head. Any suggestions on opcodes will be great. Jobs Here are a current list of jobs wanted for this project: This is an opensource project, I'm doing this because I feel like it, please can the capitalists stop asking how much I will pay them. If that was the case I would start a company. Secondly, You can do this and gain experience and have a reference for when you apply for a job. If you fit multiple descriptions listed below just list that in your email. Don't forget to either list/give links to projects you have worked on. I really need programmers rather than designers now. Although designers are still welcome. Verilog Designer: Experiance in CPU design required RISC, CISC, LIW, or VLIW. Or in FPU or Vector co-processor design. Please email me at ali@a.... Verilog Designer: Experiance in high speed interconnect networks or in hardware routing chips. Please email me at ali@a.... Verilog Designer: Experiance in high speed busses. Please email me at ali@a.... Verilog Designer: Other fields of experiance are welcome please email me at ali@a... and list some of what you have worked on. Programmer: Compiler designer for VLIW instruction set wanted. Experience in compiler design is recommended. Email me at ali@a.... Programmer: Assembler designer for VLIW instruction set wanted. Experience wanted. Please email me at ali@a.... Chips Needed to be designed: HyperMTA Processor Memory Interconnect Controller (Memory interface to DDR/QDR) Processor Control Network Controller Device controller bridge Devices such as ethernet, vga console, serial console/serial port, etc. Many of these will be taken from already done projects on the open cores website and will be interfaced with a device controller bridge. Software Needed to be designed: Assembler/Compiler Operating System