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Bluespec Cryptosorter: Overview Details Name: cryptosorter Created: 28-Jun-2008 08:52:11 Updated: 01-Jul-2008 16:24:14 CVS: browse Other project properties Language :: Other Phaze :: FPGA proven Development status :: Beta Project maintainers Myron King Kermin Fleming Alfred Man Cheuk Ng Statistics view Description This IP core loads an unsorted, encrypted list of numbers from memory. It then decrypts and sorts the list. Sorting is acheived using a high-throughput, heavily parametric mergesort core. Features Highly parametric mergsort core folds a single comparator across multiple fifos mapped onto SRAMs compartor scheduler as a parameter High speed PLB master core achieves effective memory throughput of more than 400MB/s uses configurable burst transfers to obtain high throughput Pipelined AES core Status This project is completed and development is closed. It has been successfully implemented on FPGA.