Overview :: News :: Downloads :: Tracker

AVR Core: Overview Details Name: avr_core Created: 05-Nov-2002 13:10:30 Updated: 30-Aug-2008 16:13:47 CVS: no files in cvs Other project properties Category :: Microprocessor Development status :: Production/Stable Project maintainers Ruslan Lepetenok Statistics view Opened bugs project has opened bugs Description Microcontroller core compatible with one used in AT mega 103 and written in VHDL. It has the same instruction timing and the same instruction set (with a few exceptions). Features • Core features: – 32 x 8 general purpose registers – Twenty three interrupt vectors – Supports up to 128 Kb of program and up to 64 Kb of data memory • Peripheral features: – Programmable UART – Two 8-bit Timer/Counters with separate prescalers and PWM – Eight external interrupt sources – Two parallel ports Status The core was tested with several ASM and C programs. It was implemented in Altera EPF10K50ETC144-3 device and tested with AVR port of uC/OS-II The Real-Time Kernel, written by Ole Saether.(I used special version of the design with external SRAM for both program and data memories).