LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
    •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us

    •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
    •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
    •  
    Overview :: News :: Downloads :: Tracker :: Discussions (cores)    

    Discrete Cosine Transform core: News

    Date News
    12-Sep-2006 Changes commited to CVS
    28-Apr-2006 Redesigned, now computes DCT coefficient every clock cycle. Release MDCT_REL_B1_5
    26-Apr-2006 Changes commited to CVS
    22-Apr-2006 MDCT_REL_B1_4: Improved performance by 8%, latency reduced to 94 clock cycles
    22-Apr-2006 Changes commited to CVS
    21-Apr-2006 Release MDCT_REL_B1_3 changed ROM model to synchronous
    21-Apr-2006 Changes commited to CVS
    15-Apr-2006 Source code uploaded (Beta Release)
    14-Apr-2006 Project started
    Total: 9

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.