LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Overview :: News :: Downloads :: Tracker    

    Aquarius: News

    Date News
    10-Dec-2003 << Caution >> It may cause inconsistency between RTL and synthesized net that default value of EX_KEEP_CYC is set to "x" in 'decode.v'. I believe such inconsistency is derived from only EX_KEEP_CYC. But just to make sure, I avoid every substitution of "x" except for "default" statement whose "case" describes all logic spaces. I updated following files; 'decode.v', 'mem.v', 'datapath.v'.
    31-Aug-2003 Add a simple Brouchure. Add a verilog source list "test.txt" for verilog simulation in CVS directory verification/tools. (See page 24 of Aquarius.pdf.)
    21-Jul-2003 Add a new application which calculates the Circular Constant (Pi) with long figures to verilfy the quality of Aquarius. And, update the Aquarius documents.
    13-Jul-2003 First Release Version Uploaded.
    12-Jul-2003 Project started
    Total: 5

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.