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    Personal page of Olivier Schneider

    Usernamepoppy
    FullnameOlivier Schneider
    Emailolivier.schneider@g...
    CityGrenoble
    CountryFrance
    Account created   02-Jun-2004 14:39:20
    Last logged in30-May-2005 15:50:14

    Skils
    Since 2004, engineer in microelectronics from the ENSERG.

    Projects

  • miniMIPS
    The miniMIPS is a 5 stage pipeline based on the MIPS I instruction set which is a 32 bits RISC architecture. Nearly all the instructions are supported with some custom feaures added.
    The core has been prototyped on an FPGA during an internship.

    This project was developped during an student project from the ENSERG university in Grenoble, France.

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