|
Personal page of Kauser Johar
| Username | kauserjohar |
| Fullname | Kauser Johar |
| Email | kauser.johar@g... |
| City | Bangalore |
| State | karnataka |
| Country | IN |
| Account created | 05-Apr-2008 11:58:48 |
| Last logged in | 11-Nov-2008 18:44:13 |
|
|
Skils
1. VHDL.
2. Embedded Programming using Dynamic C.
3. Currently working with TCL scripting language.
Projects
nonrestoringsquareroot
Square root operation is hard to implement on FPGAs because of the complexity of the algorithms. In this project, I intend to implement a very simple single precision floating point square root algorithm on FPGA. It is low-cost iterative implementation that uses a traditional adder/subtractor. The operation latency is 25 clock cycles and the issue rate is 24 clock cycles.
|
 |
Browse
