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    Personal page of Imhof Manuel

    Usernameimme
    FullnameImhof Manuel
    Emailmanuelimhof@h...
    CountryCH
    Account created   28-Dec-2001 15:58:49
    Last logged in17-Jan-2002 13:15:24

    Projects

  • RISC_Core_I
    This is a 4 stage 16-Bit RISC processor system on chip designed for a Xilinx Virtex FPGA. RAM and ROM both are blockRAM based.
    Additionally, it is equiped with a parallel multiplier, a 8-Bit input and a 8-Bit output port.
    This core wasn't designed for commercial but for educational use.

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