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    Personal page of Giovanni Ferrante

    Usernamegferrante
    FullnameGiovanni Ferrante
    Emailgferrante@f...
    CityBologna
    CountryIT
    Account created   16-Mar-2003 23:54:33
    Last logged in19-Nov-2008 23:10:35

    Projects

  • Cpu Generator
    CpuGen (TM) generates customizable RISC cpu cores.
    It allows direct customization of address/data/instruction bus size, interrupt handling, indirect addressing, data/instruction latency timings and custom instructions definition.
    It is targeted to low size FPGAs, easy to use and getting started with. GNU VHDL source code provided.

    • News

  • Cpu Generator 2.0 Released

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