LOGIN
:::
RECOVER PASS
:::
GET ACCOUNT
Browse
Projects
Code (CVS)
Forums
News
Articles
Polls
OpenCores
FAQ
CVS HowTo
Mission
Media
Tools
Advertise
Mirrors
Logos
Contact us
Job Opportunity
Tools
Search
Download Cores (CVSGet)
More
Wishbone
Perlilog
EDA tools
OpenTech CD
Personal page of Malik Ahmad Yar Khan
Username
ahmadyar
Fullname
Malik Ahmad Yar Khan
Email
ahmadyarkhan@y...
Account created
31-Jan-2003 12:31:30
Last logged in
27-Apr-2003 11:13:21
Projects
EPP v1.9
well It will be a simple EPP interface from a prepherial point of view , and will be a FSM based synchronous design in verilog.
Copyright (c) 1999 OPENCORES.ORG. All rights reserved.