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    Navigation: All forums > Cores > Message List > Message Post

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    From: alessandro.poppi at tiscali.it<alessandro.poppi@t...>
    Date: Wed Jul 30 09:24:12 CEST 2008
    Subject: [oc] DDR IP for Spartan 3E Xilinx evakit
    Top

    ----- Original Message -----
    From: Klaus.Rindtorff at
    googlemail.com<Klaus.Rindtorff@g...>
    To:
    Date: Mon Jul 28 08:31:16 CEST 2008
    Subject: [oc] DDR IP for Spartan 3E Xilinx evakit

    > Hi Alessandro, we have the same goal: using the DDR SDRAM on the
    > S3E
    > board. So far I am trying to make the Opencores DDR_SDR core from
    > this
    > site work for me. Writes are ok, but I still have problems with
    > reads
    > in some circumstances.

    IC... I'm new to DDR and it seems critical.

    Your other option would be to use MIG from
    > the
    > ISE SDK to generate a core for you. I didn't try that yet as the
    > generated core looks too complicated to me.

    Too complicated to me too! When I generated the source code, I could
    not believe it! It's larger than the whole project :-) definitely too
    complicated.

    Ciao!
    Alessandro

    >
    >

     
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