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    Navigation: All forums > Cores > Message List > Message Post

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    From: H. Peter Anvin<hpa@z...>
    Date: Sat Apr 5 03:44:28 CEST 2008
    Subject: [oc] FPGA based Co-processor for reducing CPU burden on TCP/IP processing
    Top
    Ricky James Allam wrote:
    > Hi All:
    >
    > I am new in FPGA design and am currently doing a personal research project on how to implement a co-processor using HyperTransport technology. The co-processor is to be used to reduce the burden of the host CPU (AMD Opteron) in processing TCP/IP protocols.
    >
    > Can you provide me some ideas on this to come up with a rough prototype of the project?
    >
    > Your help is highly appreciated.
    >

    I hate to say it, but it probably makes more sense to integrate the
    network interface -- both to reduce memory bandwidth and give you more
    direct control over it. At that point, you're a TOE Ethernet card.

    -hpa

     
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