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Message
From: Rick Collins<gnuarm.2006@a...>
Date: Fri Feb 15 17:09:56 CET 2008
Subject: [oc] Test benches
I tried searching the forums for this topic, but the search was not
formatted correctly and Google gave me this error...
Your search - /forums.cgi/cores test bench - did not match any documents.
My question is about test benches. I don't see anything here
specifically for test benches. Is this site exclusively about
synthesizable code? In particular, I was looking for a model that
would replace the digital interface of a Codec in my test bench. My
FPGA will be controlling a Codec. If I write the model myself, then
I am only verifying that I can write code to implement what I think
is the interface. By using an existing model I would be performing
an actual verification of my interface.
Is there any interest here for having test bench models for various
common interfaces?
While researching this topic, I did find a site that seems to be all
about chip models, attachment-0001.htm
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