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Message
From: Guy Hutchison<ghutchis@g...>
Date: Mon Oct 1 18:48:43 CEST 2007
Subject: [oc] I am having trouble with post - synthesis in Libero
This is a fairly normal start for gate-level simulation. Start by checking
your clocks and resets. Synchronous resets, in particular, cause problems
in gate-level sim, esp. when used with gated clocks.
And there won't be any warnings -- the simulator is doing exactly what it's
supposed to do. :)
On 9/27/07, Iwan Kruger <attachment.htm
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