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From: pravakta at opencores.org<pravakta@o...>
Date: Thu Aug 2 14:42:34 CEST 2007
Subject: [oc] wb_dma

hi,
Can you please tell me the diffrence between software DMA request
and HARDware DMA request?plz..
----- Original Message -----
From: Rudolf Usselmann<rudi@a...>
To:
Date: Wed Jun 2 13:01:19 CEST 2004
Subject: [oc] wb_dma

> On Tue, 2004-06-01 at 19:28, davciri@l... wrote:
> > Hello , I'm an italian student, Davide, who is testing the
> wb_dma verilog code
> > for a thesis on NoC.I use the latest version of Modelsim to
> simulate the core ,
> > but the compiler returns many bugs in some files. In
> particular, it reports the
> > lack of declaration of some macro and synthax errors.
> > Can you help me?.
> >
> > Best regards
> > Davide.
> By default I do not support modelsim, as it has to many
> wired "features". However if you would post the actual
> errors you are getting, I'm sure somebody can help.
> "Normal" verilog simulators seem to simulate the core
> without any incidents. Try the free "CVER" verilog
> simulator ... (see my web page -> fre tools for a link).
> rudi
>
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