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Hi Dipak,

Hi Rohit,
The Xiling changed the grading system from spartan and virtex family. 
Higher the garde faster the device. Prior to that it was like altera 
convension.
-Moazzam

----- Original Message ----- 
From: Rohit Mathur<rohitmathurs@h...> 
To: 
Date: Thu Sep  9 09:08:59 CEST 2004 
Subject: [oc] FPGA speed grade 

> Hi Dipak, 
> 
> FPGA's come in different speed grades. So within one family, you 
> might have 
> four different speed grades for the same part number and package. I 
> am not 
> sure about Xilinx, but with Altera FPGA's the lower the -X the 
> faster the 
> FPGA. The speed is specified in terms of the tpd (pin-to-pin delay) 
> parameter in the FPGA datasheet. This affects the maximum operating 
> frequency of your design in that particular FPGA. 
> Hope this helps, 
> Regards 
> Rohit 
> ----- Original Message ----- 
> From: "Dipak Modi" <dipakm@e...> 
> To: <ASICDESIGN@y...>; "Discussion list about 
> free open source IP 
> cores" <cores@o...> 
> Sent: 09 September 2004 12:15 
> Subject: [oc] FPGA speed grade 
> Hi All, 
> What does speed grade in FPGA part name signifies? 
> Say xilinx part name: XC3S50 -4 PQ G 208 C, So how this -4 term is 
> related with the FPGA speed? 
> Thanks, 
> Dipak 
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