LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Peter Ulrik Mikkelsen<peter_um06@y...>
    Date: Tue Apr 10 23:55:17 CEST 2007
    Subject: [oc] Available: Detailed RISC CPU IP Core Design Documentation
    Top
    John,

    This looks like a neat little one. It is not the first PIC implementation I have seen out there, however, but this one does indeed seem to be very straight-forward and compact. Have you got any synthesis results on speed and area, e.g. how small does it get (to fit in a very small FPGA)?

    Does anyone know if there are legal issues in implementing one of the MicroChip PIC cores, i.e. is the instruction set not patented, or has it been placed into the public domain? I would expect MicroChip to have a commercial interest in defending their intellectual property, as they are making money on selling their standalone CPUs?

    /Peter

    >Hello,
    >
    >I have put up an article on our web site that describes a RISC CPU IP Core
    >that was created for one of our clients:
    >attachment.htm

    Follow upAuthor
    [oc] Available: Detailed RISC CPU IP Core Design DocumentationJoern Henneberg

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.