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Message
From: EPetrichenko at gmail.com<EPetrichenko@g...>
Date: Mon Mar 19 00:57:02 CET 2007
Subject: [oc] ETHERNET OVER SATA QUESTIONS
We are proceeding along in our project however there are 2 questions
which we have not been able to resolve. We are unable to synthesize
the Tri-Mode Ethernet MAC off of this site because it complains about
the "$FINISH(2)" in line 774 in the MAC_tx_FF.v file.
Also we are having problems using the VITAL library (vital_timing and
vital_primitives) while using Xilinx 9.1 ISE... We have been unable to find
any resources online on how to include these two files into the IEEE
library in Xilinx. If you know or have any knowledge of where we can
find how to do this, please let us know....
We appreciate the help greatly. Thank you.
Eric Petrichenko
PS. The 2nd question has nothing to do with the Tri-Mode Ethernet
MAC.
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