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Message
From: Guy Hutchison<ghutchis@g...>
Date: Tue Feb 20 17:15:08 CET 2007
Subject: [oc] data base for ASIC/FPGA develpers
I have used similar tools before at previous companies and created a
lightweight version of the tool for my TV80 project. It has a fairly simple
set of registers it can generate, and the RTL it outputs is specific to the
Z80 bus, but if you're looking for something to use as a starting point or
for ideas I'd look at that.
Like previous posters, I would stay away from a database solution and stick
with something simple and XML-based. XML parsers are a dime a dozen
nowadays and you can easily write multiple tools to look at your file and
pull out the information they need to write RTL, create reg descriptions,
etc.
The tool I used before was able to generate multiple "slave" files that
could be hooked up to a single master, allocate register spaces and do
address maps, automatically generate documentation, and automatically create
tests which would check the operation and integrity of the register map. It
was web & database based, and the problem with that was mainly unnecessary
complexity (now you have another server that can go down), and difficulty
building new tools to interface to the database. Also, if you're worried
about scalability, command-line tools have no difficulty generating millions
of gates worth of RTL in under a second. :)
If you're interested in building something open-source, I would be
interested in collaborating on it.
- Guy
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