LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Richard Tierney<rt-opencores@c...>
    Date: Tue Feb 20 10:18:06 CET 2007
    Subject: [oc] data base for ASIC/FPGA develpers
    Top
    I had a quick look through your doc and, with the best will in the
    world, I can't see that this would be of any use at all. There isn't any
    feature in it that made me stop and think "wow, that's something I/We
    could really have used on a project".

    What's the point? Have I missed something? At first sight, this looks a
    spec whose sole purpose is to waste time and money.

    /RT

    ReferenceAuthor
    [oc] data base for ASIC/FPGA develpersLarytet 46060479

    Follow upAuthor
    [oc] data base for ASIC/FPGA develpersJeremy Fillingim

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.