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Message
From: Guy Hutchison<ghutchis@g...>
Date: Thu Feb 8 20:55:57 CET 2007
Subject: [oc] Async reset: active high or active low?
As I recall from my (distant) board design days, the main reason for having
an active-low reset is that it's easier to keep the reset asserted low
during board power-on than to keep it high. Makes no difference for on-chip
resets, though, since it's easy enough to invert when it comes on chip...
- Guy
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