Message

Reply | Reply all

Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

From: Jan Gray<jsgray@a...>
Date: Sat Dec 30 17:05:53 CET 2006
Subject: [oc] (Improve Verilog skill) Recommend CPU core with good documentand coding?
While not Verilog, I think Gaisler's Structured VHDL Methodology is quite
interesting.
http://www.gaisler.com/doc/vhdl2proc.pdf
http://www.gaisler.com/doc/structdes.pdf

While emphatically not *good* Verilog, you may enjoy the "literate Verilog"
of RISC SoC I designed back in 2000.
"Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip":
http://fpgacpu.org/papers/soc-gr0040-paper.pdf
http://fpgacpu.org/papers/soc-gr0040-slides.pdf
Here the processor+SoC design was a Word document from which I extruded a
Verilog source file.

Jan Gray