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Message
From: Ahmed Ben Abdallah<bohmid@g...>
Date: Thu Dec 28 14:30:02 CET 2006
Subject: [oc] Query
Hi every body i'm a hardware engineer and i have been graduated this year
(June 2006)
I have have conceived some copressor (Hardware accelerator) written in VHDL
language fo the 3D algorithm and i have interfaced this accelerator with
NiosII processor as custom instructions. The result is up to 60 % speed up
compared with the software version.
Actually, i'm working on constructing a bridge and i really need some help
especially for the Avalon bus.
So can someone send me some samples or model of bridge written in VHDL
language.
I will very grateful to him and i will share with him some of my previous
work .
Best regards
2006/12/28, attachment.htm
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