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    Navigation: All forums > Cores > Message List > Message Post

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    From: Kevin Somervill<kevin.m.somervill@n...>
    Date: Tue Nov 21 17:18:17 CET 2006
    Subject: [oc] Suggested extension to wishbone bus
    Top
    Hi Miha,

    | You can implement one wishbone classic interface for reading
    | and one for
    | writing in device
    | B. DAT_I and DAT_O signals are optional, so it should be
    | allowed. Than it is
    | up to interconnect
    | to allow simultaneous access to both ports.

    That's my point. I don't see a need to define an extension considering what
    you can already do with the current spec. Unless it addresses some
    fundamental functionality.

    How are dat_i and dat_o optional? Without them, there's not much bandwidth?
    ;)

    ./ks


     
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