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Message
From: FatalLicorne at yahoo.com<FatalLicorne@y...>
Date: Mon Sep 18 11:52:41 CEST 2006
Subject: [oc] SPDIF: serial signal convert to parallel signal
Anyone has this core? I want to convert SPDIF signal to parallel
signal. It means that after converting SPDIF signal , the output has 3
line:
.continous serial clock
.word select
.Parallel data.
And is there the program that convert VHDL to Verilog ?
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