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Message
From: Mark Allyn<allyn@w...>
Date: Tue May 23 04:52:01 CEST 2006
Subject: [oc] Any varilog core for DMX512 or any other packet system
Hello:
I am in the process of implementing a DMX-512 lighinging control system and I hope to be albe to use either FPGA's or CLPD's in order to reduce/eliminate chip count.
For those of you who don't know, DMX 512 is a protocall that runs on top of EIA485 serial interface (single source to multiple drops).
Basicaly, this is a serial interface that faciltates sending packets of 512 bytes for stage lighting dimmer controls. Each bye in the 512 byte packet controls the brightness of a light.
What I am looking for are any verilog codede implementations of either DMS512 (preferably) or any other serial stream, packet system where packets of bytes are sent asynchronously.
Thank you
Mark Allyn
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