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    Navigation: All forums > Cores > Message List > Message Post

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    From: Stefan Zorn<s_zorn@h...>
    Date: Mon Apr 10 16:25:00 CEST 2006
    Subject: [oc] SDRAM CORE by altera
    Top

    Hello Everybody!

    I try to set up the SDRAM CORE from Altera, wich is free with Quartus 5.1.
    For simulation the autogenerated test bench includes a memory model by
    altera. It gets, while initializing, start values from a file named
    sdram_0.dat. Sadly this file is empty. Does anybody know, how to wright such
    a file, or has one for me?

    Best Regards

    Stefan



    ReferenceAuthor
    [oc] decoder code in vhdlRedant Steven

    Follow upAuthor
    [oc] SDRAM CORE by alteraJörn Henneberg

     
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