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Message
From: Shehryar Shaheen<shehryar.shaheen@u...>
Date: Sun Feb 26 14:26:03 CET 2006
Subject: [oc] DDR SDRAM Question
Hello ,
Had a question on the DDR SDRAM controller
The 'dqs_q' port of the controller is 'out' only , so how does the controller perform read
operations as the DQS ( or data strobe ) is genrated by the DDR SDRAM device for reads and
for writes the memory controller generates the DQS
The DQS port should be 'inout' ( 'in' for reads and 'out' for writes ) or maybe I'm missing something.
If any user or the Author himself can answer , I'll appriciate.
Best Regards
Shehryar
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