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Message
From: Colin Bathe<colin.opencores.cores@s...>
Date: Mon Feb 13 12:47:21 CET 2006
Subject: [oc] to stuart...
No it was not a joke. That is the going rate for the work that you required
doing.
A lot of people post here looking for someone else to do a job for them for
free thinking it is easy. VHDL/Verilog design is not easy as you will find
if you give it a go.
You will get help with problems here once you have made attempts yourself
but don't expect a free ride.
> hey stuart...
>
> is that $150,000 thingy a joke???
>
> btw...if u can really help me out with the subject it will be cool
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