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    Navigation: All forums > Cores > Message List > Message Post

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    From: Mikhail Matusov<misoma@r...>
    Date: Tue Aug 30 17:41:33 CEST 2005
    Subject: [oc] DDR SDRAM Model
    Top
    On Tue, 30 Aug 2005 17:14:50 +0200
    "Anna D. Ashley" <ada@c...> wrote:

    ADA> But I have no idea how I could
    ADA> simulate my controller design with Modelsim using this IBIS files (if
    ADA> it's possible).

    No, it is not possible. IBIS files are for signal integrity simulations
    with tools such as HyperLynx. Essentially they describe I/V curves of
    the input/output buffers.

    --
    Mikhail Matusov <misoma@r...>



     
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