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Message
From: secamiei at bigfoot.com<secamiei@b...>
Date: Mon Jun 6 16:26:45 CEST 2005
Subject: [oc] OPB2WB wrapper + SPI lite
Hi Rudy,
is it possible to have the Verilog Source code of that project,
because I would like to add an address decoding module, and I need to
see how the OPB2WB wrapper works internally.
Now I am working on simple address decoder, that takes the address
specified in EDK and it simply takes the upper side of that address
and substitutes it with a 0x800000xx. I hope it will work.
Regards
Sami (secamiei)
----- Original Message -----
From: Rudolf Usselmann<rudi@a...>
To:
Date: Thu Jun 2 20:11:21 CEST 2005
Subject: [oc] OPB2WB wrapper + SPI lite
> On Thu, 2005-06-02 at 15:42 +0200, secamiei at bigfoot.com wrote:
> > I checked with Chipscope, and the transfer is acknowledged
> only when
> > the address is in range 0x80000000 ->0x800000ff. If you
> change the
> > address in
> > EDK, and you write to that address, the transfer is not
> acknowledged.
> > Now I am trying to build a system with 2 SPI cores (attached
> to the
> > OPB with 2 OPB2WB wrappers). I assigned in EDK
> 0x80000000->0x800000ff
> > to the first OPB2WB wrapper (connected to the first SPI core)
> and
> > 0x80000100->0x800001ff. I hope the wrappers will accept
> those address
> > ranges.
> The problem is that when I ship a netlist version of this wrapper,
> the parameters C_BASEADDR and C_HIGHADDR get compiled in to the
> netlist. I honestly do not know how to work around this problem.
> One way would be provide a non OPB input "SELECT" which
> would
> force the address decoding outside the core, but would require
> another level of abstraction.
> If somebody could figure out how to solve this problem, I would
> be happy to create a new release of the OPB/WB wrapper ...
> Regards,
> rudi
> =============================================================
> Rudolf Usselmann, ASICS World Services, http://www.asics.ws
> Your Partner for IP Cores, Design, Verification and Synthesis
>
>
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