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    Navigation: All forums > Cores > Message List > Message Post

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    From: thomas.entner at entner-electronics.com<thomas.entner@e...>
    Date: Tue Feb 1 13:51:37 CET 2005
    Subject: [oc] conditional compilation in VHDL
    Top
    Maybe a bit too late ;-) , but you could check out EVHDL on
    www.entner-electronics.com (download-section). It basically
    implements a C-like preprocessor for VHDL.

    Regards,

    Thomas

    ----- Original Message -----
    From: unni_cv@h...
    To: cores@o...
    Date: Thu, 25 Jul 2002 14:15:15 -0100
    Subject: [oc] conditional compilation in VHDL

    >
    >
    > Hi,
    > Is there any conditional compilation switches in VHDL, like the
    > `ifdef in verilog? We can use generic and generate statemenst to
    > emulate `ifdef to an extend, but I think the flexibility is less.
    > I
    > wonder if there si any? I haven't come across yet?
    >
    > unni
    >

     
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