|
Message
From: unmesh<unmesh@s...>
Date: Tue Jan 25 11:41:45 CET 2005
Subject: [oc] I2V slave implemantation in VHDL
seems like an entry level training project in your company. try developing
it...its based around only two wires...shouldn't be terribly
complicated....actually its not...
regards
----- Original Message -----
From: <sudharr@m...>
To: <cores@o...>
Sent: Tuesday, January 11, 2005 11:31 AM
Subject: [oc] I2V slave implemantation in VHDL
> Hi All,
>
> any body can share the I2C slave model for implementing in VHDL? It will
> be more helpful if u can giveme the testbech also..
>
> thanks in advance..
>
> S.RANGA REDDY
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/cores
Scanned by the SecureSynergy VirusScreen Service.
For more information log on to : http://www.securesynergyonline.com or http://www.securesynergy.com
|
 |
Browse
